Hi, > -----Original Message----- > From: Dmitry Kozlyuk <[email protected]> > Sent: Friday, January 14, 2022 12:52 PM > To: [email protected] > Cc: [email protected]; Wang Yunjian <[email protected]>; Slava > Ovsiienko <[email protected]>; Matan Azrad <[email protected]> > Subject: [PATCH] common/mlx5: fix MR lookup for non-contiguous mempool > > Memory region (MR) lookup by address inside mempool MRs was not > accounting for the upper bound of an MR. > For mempools covered by multiple MRs this could return a wrong MR LKey, > typically resulting in an unrecoverable TxQ failure: > > mlx5_net: Cannot change Tx QP state to INIT Invalid argument > > Corresponding message from /var/log/dpdk_mlx5_port_X_txq_Y_index_Z*: > > Unexpected CQE error syndrome 0x04 CQN = 128 SQN = 4848 > wqe_counter = 0 wq_ci = 9 cq_ci = 122 > > This is likely to happen with --legacy-mem and IOVA-as-PA, because EAL > intentionally maps pages at non-adjacent PA to non-adjacent VA in this > mode, and MLX5 PMD works with VA. > > Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities") > Cc: [email protected] > > Reported-by: Wang Yunjian <[email protected]> > Signed-off-by: Dmitry Kozlyuk <[email protected]> > Reviewed-by: Viacheslav Ovsiienko <[email protected]>
Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh
