The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=e444a9ba5ca351fdb7540040110fbf5d1a789c2a
commit e444a9ba5ca351fdb7540040110fbf5d1a789c2a Author: Andrew Turner <[email protected]> AuthorDate: 2022-06-24 11:51:26 +0000 Commit: Andrew Turner <[email protected]> CommitDate: 2022-07-19 07:03:30 +0000 Add the SVE reigster definitions Sponsored by: The FreeBSD Foundation (cherry picked from commit 2f317e7312971812bde8b8b0d9da21a2c1d378a3) --- sys/arm64/include/armreg.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index c164ebe9ece6..3753d550a256 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -108,6 +108,11 @@ #define CNTP_CTL_ISTATUS (1 << 2) /* CPACR_EL1 */ +#define CPACR_ZEN_MASK (0x3 << 16) +#define CPACR_ZEN_TRAP_ALL1 (0x0 << 16) /* Traps from EL0 and EL1 */ +#define CPACR_ZEN_TRAP_EL0 (0x1 << 16) /* Traps from EL0 */ +#define CPACR_ZEN_TRAP_ALL2 (0x2 << 16) /* Traps from EL0 and EL1 */ +#define CPACR_ZEN_TRAP_NONE (0x3 << 16) /* No traps */ #define CPACR_FPEN_MASK (0x3 << 20) #define CPACR_FPEN_TRAP_ALL1 (0x0 << 20) /* Traps from EL0 and EL1 */ #define CPACR_FPEN_TRAP_EL0 (0x1 << 20) /* Traps from EL0 */ @@ -1503,4 +1508,9 @@ #define TTBR_CnP_SHIFT 0 #define TTBR_CnP (1ul << TTBR_CnP_SHIFT) +/* ZCR_EL1 - SVE Control Register */ +#define ZCR_LEN_SHIFT 0 +#define ZCR_LEN_MASK (0xf << ZCR_LEN_SHIFT) +#define ZCR_LEN_BYTES(x) ((((x) & ZCR_LEN_MASK) + 1) * 16) + #endif /* !_MACHINE_ARMREG_H_ */
