The branch main has been updated by pkubaj: URL: https://cgit.FreeBSD.org/src/commit/?id=a146207d66f320ed239c1059de9df854b66b55b7
commit a146207d66f320ed239c1059de9df854b66b55b7 Author: Piotr Kubaj <[email protected]> AuthorDate: 2023-07-06 23:45:44 +0000 Commit: Piotr Kubaj <[email protected]> CommitDate: 2023-07-06 23:45:44 +0000 ixl: implement support for dumping NIC registers To enable faster debug of customer issues Intel wants an end user to gather information about PHY configuration and status to debug link and connection issues in the field. For this reason the end user should have possibility of obtaining PHYs registers values at runtime during debugging. Differential Revision: https://reviews.freebsd.org/D40354 Approved by: erj --- sys/dev/ixl/i40e_register.h | 12 +++++++++ sys/dev/ixl/ixl_pf_main.c | 60 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) diff --git a/sys/dev/ixl/i40e_register.h b/sys/dev/ixl/i40e_register.h index ffc6a7e506a6..85bcb454b3e6 100644 --- a/sys/dev/ixl/i40e_register.h +++ b/sys/dev/ixl/i40e_register.h @@ -1443,6 +1443,18 @@ #define I40E_PRTMAC_PCS_XAUI_SWAP_B_SWAP_RX_LANE1_MASK I40E_MASK(0x3, I40E_PRTMAC_PCS_XAUI_SWAP_B_SWAP_RX_LANE1_SHIFT) #define I40E_PRTMAC_PCS_XAUI_SWAP_B_SWAP_RX_LANE0_SHIFT 14 #define I40E_PRTMAC_PCS_XAUI_SWAP_B_SWAP_RX_LANE0_MASK I40E_MASK(0x3, I40E_PRTMAC_PCS_XAUI_SWAP_B_SWAP_RX_LANE0_SHIFT) +/* _i=0...3 */ /* Reset: GLOBR */ +#define I40E_PRTMAC_PCS_LINK_STATUS1(_i) (0x0008C200 + ((_i) * 4)) +#define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT 24 +#define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_MASK \ + I40E_MASK(0x7, I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT) +#define I40E_PRTMAC_PCS_LINK_STATUS2 0x0008C220 +#define I40E_PRTMAC_PCS_LINK_CTRL 0x0008C260 +#define I40E_PRTMAC_PCS_XGMII_FIFO_STATUS 0x0008C320 +#define I40E_PRTMAC_PCS_AN_LP_STATUS 0x0008C680 +#define I40E_PRTMAC_PCS_KR_STATUS 0x0008CA00 +#define I40E_PRTMAC_PCS_FEC_KR_STATUS1 0x0008CC20 +#define I40E_PRTMAC_PCS_FEC_KR_STATUS2 0x0008CC40 #define I40E_GL_FWRESETCNT 0x00083100 /* Reset: POR */ #define I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT 0 #define I40E_GL_FWRESETCNT_FWRESETCNT_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT) diff --git a/sys/dev/ixl/ixl_pf_main.c b/sys/dev/ixl/ixl_pf_main.c index 4a28afc185f0..1ba59c0592a7 100644 --- a/sys/dev/ixl/ixl_pf_main.c +++ b/sys/dev/ixl/ixl_pf_main.c @@ -67,6 +67,7 @@ static int ixl_sysctl_set_link_active(SYSCTL_HANDLER_ARGS); /* Debug Sysctls */ static int ixl_sysctl_link_status(SYSCTL_HANDLER_ARGS); static int ixl_sysctl_phy_abilities(SYSCTL_HANDLER_ARGS); +static int ixl_sysctl_phy_statistics(SYSCTL_HANDLER_ARGS); static int ixl_sysctl_sw_filter_list(SYSCTL_HANDLER_ARGS); static int ixl_sysctl_hw_res_alloc(SYSCTL_HANDLER_ARGS); static int ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS); @@ -2671,6 +2672,10 @@ ixl_add_device_sysctls(struct ixl_pf *pf) CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, pf, 0, ixl_sysctl_queue_interrupt_table, "A", "View MSI-X indices for TX/RX queues"); + SYSCTL_ADD_PROC(ctx, debug_list, + OID_AUTO, "phy_statistics", CTLTYPE_STRING | CTLFLAG_RD, + pf, 0, ixl_sysctl_phy_statistics, "A", "PHY Statistics"); + if (pf->has_i2c) { SYSCTL_ADD_PROC(ctx, debug_list, OID_AUTO, "read_i2c_byte", @@ -3511,6 +3516,61 @@ ixl_sysctl_phy_abilities(SYSCTL_HANDLER_ARGS) return (error); } +static int +ixl_sysctl_phy_statistics(SYSCTL_HANDLER_ARGS) +{ + struct ixl_pf *pf = (struct ixl_pf *)arg1; + struct i40e_hw *hw = &pf->hw; + device_t dev = pf->dev; + struct sbuf *buf; + int error = 0; + + buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); + if (buf == NULL) { + device_printf(dev, "Could not allocate sbuf for sysctl output.\n"); + return (ENOMEM); + } + + if (hw->mac.type == I40E_MAC_X722) { + sbuf_printf(buf, "\n" + "PCS Link Control Register: unavailable\n" + "PCS Link Status 1: unavailable\n" + "PCS Link Status 2: unavailable\n" + "XGMII FIFO Status: unavailable\n" + "Auto-Negotiation (AN) Status: unavailable\n" + "KR PCS Status: unavailable\n" + "KR FEC Status 1 – FEC Correctable Blocks Counter: unavailable\n" + "KR FEC Status 2 – FEC Uncorrectable Blocks Counter: unavailable" + ); + } else { + sbuf_printf(buf, "\n" + "PCS Link Control Register: %#010X\n" + "PCS Link Status 1: %#010X\n" + "PCS Link Status 2: %#010X\n" + "XGMII FIFO Status: %#010X\n" + "Auto-Negotiation (AN) Status: %#010X\n" + "KR PCS Status: %#010X\n" + "KR FEC Status 1 – FEC Correctable Blocks Counter: %#010X\n" + "KR FEC Status 2 – FEC Uncorrectable Blocks Counter: %#010X", + rd32(hw, I40E_PRTMAC_PCS_LINK_CTRL), + rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS1(0)), + rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS2), + rd32(hw, I40E_PRTMAC_PCS_XGMII_FIFO_STATUS), + rd32(hw, I40E_PRTMAC_PCS_AN_LP_STATUS), + rd32(hw, I40E_PRTMAC_PCS_KR_STATUS), + rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS1), + rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS2) + ); + } + + error = sbuf_finish(buf); + if (error) + device_printf(dev, "Error finishing sbuf: %d\n", error); + + sbuf_delete(buf); + return (error); +} + static int ixl_sysctl_sw_filter_list(SYSCTL_HANDLER_ARGS) {
