The branch main has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=e1353dcb63bbdb33be6a907ed6236c120518129e
commit e1353dcb63bbdb33be6a907ed6236c120518129e Author: Kevin Bowling <[email protected]> AuthorDate: 2023-07-31 15:16:24 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2023-07-31 15:19:14 +0000 e1000: Fix lem(4)/em(4) TSO6 * Fix TSO6 by specializing IP checksum insertion and following Intel SDM values for IPv6. * Remove unnecessary 82544 IP-bit handling * Remove TSO6 from lem(4) capabilitities Reviewed by: erj (earlier version) MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D41170 --- sys/dev/e1000/em_txrx.c | 40 ++++++++++++++++++++++++---------------- sys/dev/e1000/if_em.c | 9 ++++----- 2 files changed, 28 insertions(+), 21 deletions(-) diff --git a/sys/dev/e1000/em_txrx.c b/sys/dev/e1000/em_txrx.c index 0e433f388ac5..b90ab21cd825 100644 --- a/sys/dev/e1000/em_txrx.c +++ b/sys/dev/e1000/em_txrx.c @@ -141,7 +141,6 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, uint32_t *txd_upper, if_softc_ctx_t scctx = sc->shared; struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; struct tx_ring *txr = &que->txr; - struct e1000_hw *hw = &sc->hw; struct e1000_context_desc *TXD; int cur, hdr_len; uint32_t cmd_type_len; @@ -151,27 +150,39 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, uint32_t *txd_upper, E1000_TXD_DTYP_D | /* Data descr type */ E1000_TXD_CMD_TSE); /* Do TSE on this packet */ - /* IP and/or TCP header checksum calculation and insertion. */ - *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8; - cur = pi->ipi_pidx; TXD = (struct e1000_context_desc *)&txr->tx_base[cur]; /* - * Start offset for header checksum calculation. - * End offset for header checksum calculation. - * Offset of place put the checksum. + * ipcss - Start offset for header checksum calculation. + * ipcse - End offset for header checksum calculation. + * ipcso - Offset of place to put the checksum. */ + switch(pi->ipi_etype) { + case ETHERTYPE_IP: + /* IP and/or TCP header checksum calculation and insertion. */ + *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8; + + TXD->lower_setup.ip_fields.ipcse = + htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1); + break; + case ETHERTYPE_IPV6: + /* TCP header checksum calculation and insertion. */ + *txd_upper = E1000_TXD_POPTS_TXSM << 8; + + TXD->lower_setup.ip_fields.ipcse = htole16(0); + break; + default: + break; + } TXD->lower_setup.ip_fields.ipcss = pi->ipi_ehdrlen; - TXD->lower_setup.ip_fields.ipcse = - htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1); TXD->lower_setup.ip_fields.ipcso = pi->ipi_ehdrlen + offsetof(struct ip, ip_sum); /* - * Start offset for payload checksum calculation. - * End offset for payload checksum calculation. - * Offset of place to put the checksum. + * tucss - Start offset for payload checksum calculation. + * tucse - End offset for payload checksum calculation. + * tucso - Offset of place to put the checksum. */ TXD->upper_setup.tcp_fields.tucss = pi->ipi_ehdrlen + pi->ipi_ip_hlen; TXD->upper_setup.tcp_fields.tucse = 0; @@ -188,16 +199,13 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, uint32_t *txd_upper, /* * "PCI/PCI-X SDM 4.0" page 45, and "PCIe GbE SDM 2.5" page 63 * - Set up basic TUCMDs - * - Enable IP bit on 82544 * - For others IP bit on indicates IPv4, while off indicates IPv6 */ cmd_type_len = sc->txd_cmd | E1000_TXD_CMD_DEXT | /* Extended descr */ E1000_TXD_CMD_TSE | /* TSE context */ E1000_TXD_CMD_TCP; /* Do TCP checksum */ - if (hw->mac.type == e1000_82544) - cmd_type_len |= E1000_TXD_CMD_IP; - else if (pi->ipi_etype == ETHERTYPE_IP) + if (pi->ipi_etype == ETHERTYPE_IP) cmd_type_len |= E1000_TXD_CMD_IP; TXD->cmd_and_length = htole32(cmd_type_len | (pi->ipi_len - hdr_len)); /* Total len */ diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c index 1f6100cff293..40579b0a5a55 100644 --- a/sys/dev/e1000/if_em.c +++ b/sys/dev/e1000/if_em.c @@ -784,8 +784,7 @@ em_set_num_queues(if_ctx_t ctx) #define LEM_CAPS \ IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \ IFCAP_VLAN_HWCSUM | IFCAP_WOL | IFCAP_VLAN_HWFILTER | IFCAP_TSO4 | \ - IFCAP_LRO | IFCAP_VLAN_HWTSO| IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6 | \ - IFCAP_TSO6 + IFCAP_LRO | IFCAP_VLAN_HWTSO | IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6 #define EM_CAPS \ IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \ @@ -937,14 +936,14 @@ em_if_attach_pre(if_ctx_t ctx) scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER; scctx->isc_tx_tso_size_max = EM_TSO_SIZE; scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE; - scctx->isc_capabilities = scctx->isc_capenable = EM_CAPS; + scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS; /* - * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO,TSO6} + * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO} * by default as we don't have workarounds for all associated * silicon errata. TSO4 may work on > 82544 but its status * is unknown by the authors. Please report any success or failures. */ - scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO | IFCAP_TSO6); + scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO); scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO | CSUM_IP6_TCP | CSUM_IP6_UDP;
