git: dbb620910f15 - main - hwpmc/arm64: PMCR_EL0 is a 64-bit register

[Andrew Turner]

The branch main has been updated by andrew:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=dbb620910f1572be46e873ae352e18f60120b369

commit dbb620910f1572be46e873ae352e18f60120b369
Author:     Andrew Turner <and...@freebsd.org>
AuthorDate: 2025-05-27 19:54:59 +0000
Commit:     Andrew Turner <and...@freebsd.org>
CommitDate: 2025-05-27 19:54:59 +0000

    hwpmc/arm64: PMCR_EL0 is a 64-bit register
    
    Use uint64_t to store PMCR_EL0 as it's a 64-bit register and fields may
    be present in the upper 64-bits.
    
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D50427
---
 sys/dev/hwpmc/hwpmc_arm64.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sys/dev/hwpmc/hwpmc_arm64.c b/sys/dev/hwpmc/hwpmc_arm64.c
index 28745b4a3028..b547ad2fa53e 100644
--- a/sys/dev/hwpmc/hwpmc_arm64.c
+++ b/sys/dev/hwpmc/hwpmc_arm64.c
@@ -113,7 +113,7 @@ arm64_counter_disable(unsigned int pmc)
 /*
  * Performance Monitors Control Register
  */
-static uint32_t
+static uint64_t
 arm64_pmcr_read(void)
 {
        uint32_t reg;
@@ -124,7 +124,7 @@ arm64_pmcr_read(void)
 }
 
 static void
-arm64_pmcr_write(uint32_t reg)
+arm64_pmcr_write(uint64_t reg)
 {
 
        WRITE_SPECIALREG(pmcr_el0, reg);
@@ -500,7 +500,7 @@ arm64_pcpu_init(struct pmc_mdep *md, int cpu)
 static int
 arm64_pcpu_fini(struct pmc_mdep *md, int cpu)
 {
-       uint32_t pmcr;
+       uint64_t pmcr;
 
        PMCDBG0(MDP, INI, 1, "arm64-pcpu-fini");
 
@@ -521,7 +521,7 @@ pmc_arm64_initialize(void)
        struct pmc_mdep *pmc_mdep;
        struct pmc_classdep *pcd;
        int classes, idcode, impcode;
-       int pmcr;
+       uint64_t pmcr;
        uint64_t midr;
 
        pmcr = arm64_pmcr_read();