The branch main has been updated by bnovkov:
URL:
https://cgit.FreeBSD.org/src/commit/?id=092b70dadb1bd511e7b500144aed3d80b32c5f2c
commit 092b70dadb1bd511e7b500144aed3d80b32c5f2c
Author: Bojan Novković <bnov...@freebsd.org>
AuthorDate: 2025-01-18 19:13:44 +0000
Commit: Bojan Novković <bnov...@freebsd.org>
CommitDate: 2025-08-01 12:35:54 +0000
riscv: Add cvitek SoC files to the build
Reviewed by: br, jrtc27
Differential Revision: https://reviews.freebsd.org/D48533
---
sys/riscv/conf/GENERIC | 1 +
sys/riscv/conf/std.cvitek | 14 ++++++++++++++
sys/riscv/cvitek/files.cvitek | 4 ++++
3 files changed, 19 insertions(+)
diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC
index 7d7d0ca6e79c..a8500fe80019 100644
--- a/sys/riscv/conf/GENERIC
+++ b/sys/riscv/conf/GENERIC
@@ -206,6 +206,7 @@ device iicoc # OpenCores I2C
controller support
# Include SoC specific configuration
include "std.allwinner"
+include "std.cvitek"
include "std.eswin"
include "std.sifive"
include "std.starfive"
diff --git a/sys/riscv/conf/std.cvitek b/sys/riscv/conf/std.cvitek
new file mode 100644
index 000000000000..8eb146282462
--- /dev/null
+++ b/sys/riscv/conf/std.cvitek
@@ -0,0 +1,14 @@
+#
+# CVITEK SoC support
+#
+
+device fdt
+device dwc
+device dwgpio
+device uart_snps
+device dwc_cvitek
+device sdhci_cvitek
+device cvitek_reset
+device cvitek_restart
+
+files "../cvitek/files.cvitek"
diff --git a/sys/riscv/cvitek/files.cvitek b/sys/riscv/cvitek/files.cvitek
new file mode 100644
index 000000000000..bf89ee390403
--- /dev/null
+++ b/sys/riscv/cvitek/files.cvitek
@@ -0,0 +1,4 @@
+riscv/cvitek/cvitek_restart.c optional fdt cvitek_restart
+riscv/cvitek/cvitek_reset.c optional fdt cvitek_reset
+dev/dwc/if_dwc_cvitek.c optional fdt dwc_cvitek
+dev/sdhci/sdhci_fdt_cvitek.c optional fdt sdhci sdhci_cvitek
regulator
