The branch main has been updated by mhorne:
URL:
https://cgit.FreeBSD.org/src/commit/?id=c0771d8c78b421b26c9b32a899f8d0131bb46ef4
commit c0771d8c78b421b26c9b32a899f8d0131bb46ef4
Author: Jari Sihvola <js...@gmx.com>
AuthorDate: 2025-08-20 17:13:00 +0000
Commit: Mitchell Horne <mho...@freebsd.org>
CommitDate: 2025-08-20 18:09:37 +0000
jh7110_pcie.c: add empty PIC methods to conform conventions
This commit updates the driver code to conform with an undocumented
convention which says that certain functions need always be implemented
together regardless of their content (or lack of). It's been said that
unimplemented KOBJ methods become stubs which return ENXIO so this
commit does not imply a functional change.
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D52042
---
sys/riscv/starfive/jh7110_pcie.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/sys/riscv/starfive/jh7110_pcie.c b/sys/riscv/starfive/jh7110_pcie.c
index 2d0a4be69b2c..5181252ab2dc 100644
--- a/sys/riscv/starfive/jh7110_pcie.c
+++ b/sys/riscv/starfive/jh7110_pcie.c
@@ -482,6 +482,16 @@ jh7110_pcie_msi_enable_intr(device_t dev, struct
intr_irqsrc *isrc)
jh7110_pcie_msi_mask(dev, isrc, false);
}
+static void
+jh7110_pcie_msi_post_filter(device_t dev, struct intr_irqsrc *isrc)
+{
+}
+
+static void
+jh7110_pcie_msi_post_ithread(device_t dev, struct intr_irqsrc *isrc)
+{
+}
+
static void
jh7110_pcie_msi_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
{
@@ -1008,6 +1018,8 @@ static device_method_t jh7110_pcie_methods[] = {
/* Interrupt controller interface */
DEVMETHOD(pic_enable_intr, jh7110_pcie_msi_enable_intr),
DEVMETHOD(pic_disable_intr, jh7110_pcie_msi_disable_intr),
+ DEVMETHOD(pic_post_filter, jh7110_pcie_msi_post_filter),
+ DEVMETHOD(pic_post_ithread, jh7110_pcie_msi_post_ithread),
DEVMETHOD(pic_pre_ithread, jh7110_pcie_msi_pre_ithread),
/* OFW bus interface */
