The branch stable/15 has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=0b94a7648ff989095ee29e1ca8031b05b27f2d15
commit 0b94a7648ff989095ee29e1ca8031b05b27f2d15 Author: Kevin Bowling <[email protected]> AuthorDate: 2026-08-22 01:24:28 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2026-09-05 00:29:29 +0000 e1000: Limit the TSO sentinel to lem(4) controllers The TSO workaround splits the final DMA segment to create a four byte sentinel descriptor. Intel documents the premature descriptor writeback erratum and this workaround in the 82540EP and 82545GM specification updates (erratum 3) and the 82546GB specification update (erratum 1). Limit the workaround and its preceding TSO state to the legacy PCI and PCI-X controllers so PCIe controllers retain their natural descriptor layout using one fewer descriptor per TSO packet, no split of the final segment, and one less four byte DMA. Sponsored by: BBOX.io (cherry picked from commit 2a7af8ebcf90af83f01f9523b25bfc6e58c7b809) --- sys/dev/e1000/em_txrx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sys/dev/e1000/em_txrx.c b/sys/dev/e1000/em_txrx.c index 754f1a139065..a4f258e9d09b 100644 --- a/sys/dev/e1000/em_txrx.c +++ b/sys/dev/e1000/em_txrx.c @@ -211,7 +211,11 @@ em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, uint32_t *txd_upper, TXD->cmd_and_length = htole32(cmd_type_len | (pi->ipi_len - hdr_len)); /* Total len */ - txr->tx_tso = true; + /* + * 82540EP and 82545GM erratum 3 and 82546GB erratum 1 require + * a second descriptor for the final four bytes of an LSO packet. + */ + txr->tx_tso = sc->hw.mac.type < e1000_82571; if (++cur == scctx->isc_ntxd[0]) { cur = 0; @@ -377,7 +381,7 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi) /* Do hardware assists */ if (do_tso) { i = em_tso_setup(sc, pi, &txd_upper, &txd_lower); - tso_desc = true; + tso_desc = txr->tx_tso; } else if (csum_flags & EM_CSUM_OFFLOAD) { i = em_transmit_checksum_setup(sc, pi, &txd_upper, &txd_lower);
