The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=4837a14b08e290dc4f6152a97cf1ad5d4cb0e16f
commit 4837a14b08e290dc4f6152a97cf1ad5d4cb0e16f Author: Andrew Turner <[email protected]> AuthorDate: 2026-09-07 23:58:18 +0000 Commit: Andrew Turner <[email protected]> CommitDate: 2026-09-08 03:05:27 +0000 arm64: Fix the ID_AA64MMFR1_EL1.CMOW name This was incorrectly names CMOVW. Remove the unneeded 'V'. Reviewed by: Kajetan Puchalski <[email protected]> Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D59175 --- sys/arm64/arm64/identcpu.c | 6 +++--- sys/arm64/include/armreg.h | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index 832357257997..730fd265cfb0 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -1295,8 +1295,8 @@ static const struct mrs_field_value id_aa64mmfr1_ecbhb[] = { MRS_FIELD_VALUE_END, }; -static const struct mrs_field_value id_aa64mmfr1_cmovw[] = { - MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR1, CMOVW, NONE, IMPL), +static const struct mrs_field_value id_aa64mmfr1_cmow[] = { + MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR1, CMOW, NONE, IMPL), MRS_FIELD_VALUE_END, }; @@ -1386,7 +1386,7 @@ static const struct mrs_field_value id_aa64mmfr1_hafdbs[] = { static const struct mrs_field id_aa64mmfr1_fields[] = { MRS_FIELD(ID_AA64MMFR1, ECBHB, false, MRS_LOWER, 0, id_aa64mmfr1_ecbhb), - MRS_FIELD(ID_AA64MMFR1, CMOVW, false, MRS_LOWER, 0, id_aa64mmfr1_cmovw), + MRS_FIELD(ID_AA64MMFR1, CMOW, false, MRS_LOWER, 0, id_aa64mmfr1_cmow), MRS_FIELD(ID_AA64MMFR1, TIDCP1, false, MRS_LOWER, 0, id_aa64mmfr1_tidcp1), MRS_FIELD(ID_AA64MMFR1, nTLBPA, false, MRS_LOWER, 0, diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 9db452314977..bcc435e614ee 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -1515,12 +1515,12 @@ #define ID_AA64MMFR1_TIDCP1_VAL(x) ((x) & ID_AA64MMFR1_TIDCP1_MASK) #define ID_AA64MMFR1_TIDCP1_NONE (UL(0x0) << ID_AA64MMFR1_TIDCP1_SHIFT) #define ID_AA64MMFR1_TIDCP1_IMPL (UL(0x1) << ID_AA64MMFR1_TIDCP1_SHIFT) -#define ID_AA64MMFR1_CMOVW_SHIFT 56 -#define ID_AA64MMFR1_CMOVW_WIDTH 4 -#define ID_AA64MMFR1_CMOVW_MASK (UL(0xf) << ID_AA64MMFR1_CMOVW_SHIFT) -#define ID_AA64MMFR1_CMOVW_VAL(x) ((x) & ID_AA64MMFR1_CMOVW_MASK) -#define ID_AA64MMFR1_CMOVW_NONE (UL(0x0) << ID_AA64MMFR1_CMOVW_SHIFT) -#define ID_AA64MMFR1_CMOVW_IMPL (UL(0x1) << ID_AA64MMFR1_CMOVW_SHIFT) +#define ID_AA64MMFR1_CMOW_SHIFT 56 +#define ID_AA64MMFR1_CMOW_WIDTH 4 +#define ID_AA64MMFR1_CMOW_MASK (UL(0xf) << ID_AA64MMFR1_CMOW_SHIFT) +#define ID_AA64MMFR1_CMOW_VAL(x) ((x) & ID_AA64MMFR1_CMOW_MASK) +#define ID_AA64MMFR1_CMOW_NONE (UL(0x0) << ID_AA64MMFR1_CMOW_SHIFT) +#define ID_AA64MMFR1_CMOW_IMPL (UL(0x1) << ID_AA64MMFR1_CMOW_SHIFT) #define ID_AA64MMFR1_ECBHB_SHIFT 60 #define ID_AA64MMFR1_ECBHB_WIDTH 4 #define ID_AA64MMFR1_ECBHB_MASK (UL(0xf) << ID_AA64MMFR1_ECBHB_SHIFT)
