The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=5c9daa5451874c1492446dac01cc0f63eb70c4cf
commit 5c9daa5451874c1492446dac01cc0f63eb70c4cf Author: Andrew Turner <[email protected]> AuthorDate: 2026-09-08 00:00:23 +0000 Commit: Andrew Turner <[email protected]> CommitDate: 2026-09-08 03:05:27 +0000 arm64: Add ICC_SGI1R_IRM_VAL and use it This will be the name of the generated macro. As we only need to check if this field is set or not use the common ICC_SGI1R_IRM_VAL name. Reviewed by: Kajetan Puchalski <[email protected]> Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D59179 --- sys/arm64/include/armreg.h | 5 ++++- sys/arm64/vmm/io/vgic_v3.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index a58027a5a6be..207f024774e9 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -842,7 +842,10 @@ #define ICC_SGI1R_Aff2_SHIFT 32 #define ICC_SGI1R_Aff2_MASK (0xfful << ICC_SGI1R_Aff2_SHIFT) #define ICC_SGI1R_Aff2_VAL(x) ((x) & ICC_SGI1R_Aff2_MASK) -#define ICC_SGI1R_IRM (0x1UL << 40) +#define ICC_SGI1R_IRM_SHIFT 40 +#define ICC_SGI1R_IRM_WIDTH 1 +#define ICC_SGI1R_IRM_MASK (UL(0x1) << ICC_SGI1R_IRM_SHIFT) +#define ICC_SGI1R_IRM_VAL(x) ((x) & ICC_SGI1R_IRM_MASK) #define ICC_SGI1R_RS_SHIFT 44 #define ICC_SGI1R_RS_MASK (0xful << ICC_SGI1R_RS_SHIFT) #define ICC_SGI1R_RS_VAL(x) ((x) & ICC_SGI1R_RS_MASK) diff --git a/sys/arm64/vmm/io/vgic_v3.c b/sys/arm64/vmm/io/vgic_v3.c index bc5d4403b1a0..d180c2345323 100644 --- a/sys/arm64/vmm/io/vgic_v3.c +++ b/sys/arm64/vmm/io/vgic_v3.c @@ -1625,7 +1625,7 @@ vgic_v3_icc_sgi1r_write(struct vcpu *vcpu, uint64_t rval, void *arg) vcpuid = vcpu_vcpuid(vcpu); irqid = ICC_SGI1R_INTID_VAL(rval) >> ICC_SGI1R_INTID_SHIFT; - if ((rval & ICC_SGI1R_IRM) == 0) { + if (ICC_SGI1R_IRM_VAL(rval) == 0) { /* Non-zero points at no vcpus */ if (ICC_SGI1R_RS_VAL(rval) != 0) return (0);
