The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=a890eb42ae825d2711695a65aa8f604b7011f5a2
commit a890eb42ae825d2711695a65aa8f604b7011f5a2 Author: Kajetan Puchalski <[email protected]> AuthorDate: 2026-08-27 12:52:47 +0000 Commit: Andrew Turner <[email protected]> CommitDate: 2026-09-08 03:05:28 +0000 arm64/vmm: vgic_v3: Fix value of ICH_VTR_EL2.PREbits ICH_VTR_EL2.PREbits contains the number of virtual preemption bits implemented minus one, analogous to ICH_VTR_EL2.PRIbits. Unlike PRIbits, the macro for PREbits does not account for "minus one". Make the two match. Signed-off-by: Kajetan Puchalski <[email protected]> Reviewed by: andrew Sponsored by: Arm Ltd Pull Request: https://github.com/freebsd/freebsd-src/pull/2391 --- sys/arm64/vmm/io/vgic_v3_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/vmm/io/vgic_v3_reg.h b/sys/arm64/vmm/io/vgic_v3_reg.h index e805ded17097..26c3c3a95294 100644 --- a/sys/arm64/vmm/io/vgic_v3_reg.h +++ b/sys/arm64/vmm/io/vgic_v3_reg.h @@ -114,7 +114,7 @@ #define ICH_VTR_EL2_PREBITS_SHIFT 26 #define ICH_VTR_EL2_PREBITS_MASK (0x7 << ICH_VTR_EL2_PREBITS_SHIFT) #define ICH_VTR_EL2_PREBITS(x) \ - (((x) & ICH_VTR_EL2_PREBITS_MASK) >> ICH_VTR_EL2_PREBITS_SHIFT) + ((((x) & ICH_VTR_EL2_PREBITS_MASK) >> ICH_VTR_EL2_PREBITS_SHIFT) + 1) #define ICH_VTR_EL2_SEIS (1 << 22) /* System Error Interrupt (SEI) Support */ #define ICH_VTR_EL2_A3V (1 << 21) /* Affinity 3 Valid */ #define ICH_VTR_EL2_NV4 (1 << 20) /* Direct injection of virtual interrupts. RES1 for GICv3 */
