The branch main has been updated by andrew:
URL:
https://cgit.FreeBSD.org/src/commit/?id=337eb2ab9549b230926ab52857d1ef86ba121366
commit 337eb2ab9549b230926ab52857d1ef86ba121366
Author: Andrew Turner <and...@freebsd.org>
AuthorDate: 2021-08-03 13:18:07 +0000
Commit: Andrew Turner <and...@freebsd.org>
CommitDate: 2021-08-08 21:01:55 +0000
Add macros for the arm64 daifset/daifclr flags
Sponsored by: The FreeBSD Foundation
---
sys/arm64/arm64/exception.S | 6 +++---
sys/arm64/arm64/locore.S | 2 +-
sys/arm64/arm64/swtch.S | 3 ++-
sys/arm64/include/armreg.h | 9 +++++++++
sys/arm64/include/cpufunc.h | 8 ++++----
5 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S
index 9a28a5eac022..67233daf4442 100644
--- a/sys/arm64/arm64/exception.S
+++ b/sys/arm64/arm64/exception.S
@@ -75,7 +75,7 @@ __FBSDID("$FreeBSD$");
ldr x0, [x18, #(PC_CURTHREAD)]
bl dbg_monitor_enter
- msr daifclr, #8 /* Enable the debug exception */
+ msr daifclr, #DAIF_D /* Enable the debug exception */
.endif
/*
* For EL1, debug exceptions are conditionally unmasked in
@@ -90,7 +90,7 @@ __FBSDID("$FreeBSD$");
* interrupt exception handler. For EL0 exceptions, do_ast already
* did this.
*/
- msr daifset, #10
+ msr daifset, #(DAIF_D | DAIF_INTR)
.endif
.if \el == 0
ldr x0, [x18, #PC_CURTHREAD]
@@ -148,7 +148,7 @@ __FBSDID("$FreeBSD$");
bic x19, x19, #PSR_I
1:
/* Disable interrupts */
- msr daifset, #10
+ msr daifset, #(DAIF_D | DAIF_INTR)
/* Read the current thread flags */
ldr x1, [x18, #PC_CURTHREAD] /* Load curthread */
diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S
index a7e0c87bec0e..dcc370326671 100644
--- a/sys/arm64/arm64/locore.S
+++ b/sys/arm64/arm64/locore.S
@@ -168,7 +168,7 @@ END(_start)
*/
ENTRY(mpentry)
/* Disable interrupts */
- msr daifset, #2
+ msr daifset, #DAIF_INTR
/* Drop to EL1 */
bl drop_to_el1
diff --git a/sys/arm64/arm64/swtch.S b/sys/arm64/arm64/swtch.S
index 28b6acb430fd..266a5343d7cb 100644
--- a/sys/arm64/arm64/swtch.S
+++ b/sys/arm64/arm64/swtch.S
@@ -34,6 +34,7 @@
#include "opt_sched.h"
#include <machine/asm.h>
+#include <machine/armreg.h>
__FBSDID("$FreeBSD$");
@@ -217,7 +218,7 @@ ENTRY(fork_trampoline)
* Disable interrupts to avoid
* overwriting spsr_el1 and sp_el0 by an IRQ exception.
*/
- msr daifset, #10
+ msr daifset, #(DAIF_D | DAIF_INTR)
/* Restore sp, lr, elr, and spsr */
ldp x18, lr, [sp, #TF_SP]
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 6a5640ec5e3d..8c7c535e4277 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -130,6 +130,15 @@
#define DAIF_I_MASKED (1 << 7)
#define DAIF_F_MASKED (1 << 6)
+/* DAIFSet/DAIFClear */
+#define DAIF_D (1 << 3)
+#define DAIF_A (1 << 2)
+#define DAIF_I (1 << 1)
+#define DAIF_F (1 << 0)
+#define DAIF_ALL (DAIF_D | DAIF_A | DAIF_I | DAIF_F)
+#define DAIF_INTR (DAIF_I) /* All exceptions that
pass */
+ /* through the intr framework */
+
/* DCZID_EL0 - Data Cache Zero ID register */
#define DCZID_DZP (1 << 4) /* DC ZVA prohibited if non-0 */
#define DCZID_BS_SHIFT 0
diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h
index 5400f253f9a2..7f13972e838b 100644
--- a/sys/arm64/include/cpufunc.h
+++ b/sys/arm64/include/cpufunc.h
@@ -106,7 +106,7 @@ dbg_disable(void)
__asm __volatile(
"mrs %x0, daif \n"
- "msr daifset, #8 \n"
+ "msr daifset, #(" __XSTRING(DAIF_D) ") \n"
: "=&r" (ret));
return (ret);
@@ -116,7 +116,7 @@ static __inline void
dbg_enable(void)
{
- __asm __volatile("msr daifclr, #8");
+ __asm __volatile("msr daifclr, #(" __XSTRING(DAIF_D) ")");
}
static __inline register_t
@@ -127,7 +127,7 @@ intr_disable(void)
__asm __volatile(
"mrs %x0, daif \n"
- "msr daifset, #2 \n"
+ "msr daifset, #(" __XSTRING(DAIF_INTR) ") \n"
: "=&r" (ret));
return (ret);
@@ -144,7 +144,7 @@ static __inline void
intr_enable(void)
{
- __asm __volatile("msr daifclr, #2");
+ __asm __volatile("msr daifclr, #(" __XSTRING(DAIF_INTR) ")");
}
static __inline register_t
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