The branch main has been updated by jrtc27:
URL:
https://cgit.FreeBSD.org/src/commit/?id=28aaa58fa64ecb89d47f0a8396954ad8ca82d8ef
commit 28aaa58fa64ecb89d47f0a8396954ad8ca82d8ef
Author: Jessica Clarke <jrt...@freebsd.org>
AuthorDate: 2024-06-02 20:42:18 +0000
Commit: Jessica Clarke <jrt...@freebsd.org>
CommitDate: 2024-06-02 20:42:18 +0000
fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence
DELAY takes microseconds not milliseconds, so 100 was too low. Moreover,
when enabling hw.pci.clear_pcib, PCI emeration would still stop at one
of the first bridges, but by asserting PERST for the rest of the reset
sequence that appears to be reliably addressed.
Fixes: 896e217a0eae ("fu740_pci_dw: Add SiFive FU740 PCIe controller
driver")
---
sys/riscv/sifive/fu740_pci_dw.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sys/riscv/sifive/fu740_pci_dw.c b/sys/riscv/sifive/fu740_pci_dw.c
index 13937e283042..d0490d6548f2 100644
--- a/sys/riscv/sifive/fu740_pci_dw.c
+++ b/sys/riscv/sifive/fu740_pci_dw.c
@@ -215,12 +215,6 @@ fupci_phy_init(struct fupci_softc *sc)
return (error);
}
- /* Hold PERST for 100ms as per the PCIe spec */
- DELAY(100);
-
- /* Deassert PERST_N */
- FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 1);
-
/* Deassert core power-on reset (active low) */
error = gpio_pin_set_active(sc->porst_pin, true);
if (error != 0) {
@@ -280,6 +274,12 @@ fupci_phy_init(struct fupci_softc *sc)
/* Put the controller in Root Complex mode */
FUDW_MGMT_WRITE(sc, FUDW_MGMT_DEVICE_TYPE, FUDW_MGMT_DEVICE_TYPE_RC);
+ /* Hold PERST for 100ms as per the PCIe spec */
+ DELAY(100000);
+
+ /* Deassert PERST_N */
+ FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 1);
+
return (0);
}
