The branch main has been updated by np:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=9352d2f6dd55afcf0ac24d2806da7c6febf19589

commit 9352d2f6dd55afcf0ac24d2806da7c6febf19589
Author:     Navdeep Parhar <[email protected]>
AuthorDate: 2026-02-05 19:52:51 +0000
Commit:     Navdeep Parhar <[email protected]>
CommitDate: 2026-02-05 20:11:58 +0000

    cxgbe(4): sysctl to disable/enable the TCB cache
    
    The TCB cache can be enabled/disabled at any time on the T7 and this
    commit adds a sysctl to do that.  This is for debug only.
    
     # sysctl dev.chnex.0.misc.tcb_cache=0
     # sysctl dev.chnex.0.misc.tcb_cache=1
    
    MFC after:      1 week
    Sponsored by:   Chelsio Communications
---
 sys/dev/cxgbe/t4_main.c | 41 +++++++++++++++++++++++++++++++++++++++++
 sys/dev/cxgbe/t4_sge.c  | 15 ++++++++++-----
 2 files changed, 51 insertions(+), 5 deletions(-)

diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 3237c6649713..e35bb9f64951 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -900,6 +900,7 @@ static int sysctl_ulprx_la(SYSCTL_HANDLER_ARGS);
 static int sysctl_wcwr_stats(SYSCTL_HANDLER_ARGS);
 static int sysctl_cpus(SYSCTL_HANDLER_ARGS);
 static int sysctl_reset(SYSCTL_HANDLER_ARGS);
+static int sysctl_tcb_cache(SYSCTL_HANDLER_ARGS);
 #ifdef TCP_OFFLOAD
 static int sysctl_tls(SYSCTL_HANDLER_ARGS);
 static int sysctl_tp_tick(SYSCTL_HANDLER_ARGS);
@@ -8119,6 +8120,12 @@ t4_sysctls(struct adapter *sc)
                    sysctl_wcwr_stats, "A", "write combined work requests");
        }
 
+       if (chip_id(sc) >= CHELSIO_T7) {
+               SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "tcb_cache",
+                   CTLTYPE_INT | CTLFLAG_RW, sc, 0, sysctl_tcb_cache, "I",
+                   "1 = enabled (default), 0 = disabled (for debug only)");
+       }
+
 #ifdef KERN_TLS
        if (is_ktls(sc)) {
                /*
@@ -12204,6 +12211,40 @@ sysctl_reset(SYSCTL_HANDLER_ARGS)
        return (0);
 }
 
+static int
+sysctl_tcb_cache(SYSCTL_HANDLER_ARGS)
+{
+       struct adapter *sc = arg1;
+       u_int val, v;
+       int rc;
+
+       mtx_lock(&sc->reg_lock);
+       if (hw_off_limits(sc)) {
+               rc = ENXIO;
+               goto done;
+       }
+       t4_tp_pio_read(sc, &v, 1, A_TP_CMM_CONFIG, 1);
+       mtx_unlock(&sc->reg_lock);
+
+       val = v & F_GLFL ? 0 : 1;
+       rc = sysctl_handle_int(oidp, &val, 0, req);
+       if (rc != 0 || req->newptr == NULL)
+               return (rc);
+       if (val == 0)
+               v |= F_GLFL;
+       else
+               v &= ~F_GLFL;
+
+       mtx_lock(&sc->reg_lock);
+       if (hw_off_limits(sc))
+               rc = ENXIO;
+       else
+               t4_tp_pio_write(sc, &v, 1, A_TP_CMM_CONFIG, 1);
+done:
+       mtx_unlock(&sc->reg_lock);
+       return (rc);
+}
+
 #ifdef TCP_OFFLOAD
 static int
 sysctl_tls(SYSCTL_HANDLER_ARGS)
diff --git a/sys/dev/cxgbe/t4_sge.c b/sys/dev/cxgbe/t4_sge.c
index b6d44792dce4..af18b3019760 100644
--- a/sys/dev/cxgbe/t4_sge.c
+++ b/sys/dev/cxgbe/t4_sge.c
@@ -828,12 +828,17 @@ t4_tweak_chip_settings(struct adapter *sc)
                t4_set_reg_field(sc, A_SGE_ITP_CONTROL, m, v);
 
                if (sc->debug_flags & DF_DISABLE_TCB_CACHE) {
-                       m = V_RDTHRESHOLD(M_RDTHRESHOLD) | F_WRTHRTHRESHEN |
-                           V_WRTHRTHRESH(M_WRTHRTHRESH);
                        t4_tp_pio_read(sc, &v, 1, A_TP_CMM_CONFIG, 1);
-                       v &= ~m;
-                       v |= V_RDTHRESHOLD(1) | F_WRTHRTHRESHEN |
-                           V_WRTHRTHRESH(16);
+                       if (chip_id(sc) >= CHELSIO_T7) {
+                               v |= F_GLFL;
+                       } else {
+                               m = V_RDTHRESHOLD(M_RDTHRESHOLD) |
+                                   F_WRTHRTHRESHEN |
+                                   V_WRTHRTHRESH(M_WRTHRTHRESH);
+                               v &= ~m;
+                               v |= V_RDTHRESHOLD(1) | F_WRTHRTHRESHEN |
+                                   V_WRTHRTHRESH(16);
+                       }
                        t4_tp_pio_write(sc, &v, 1, A_TP_CMM_CONFIG, 1);
                }
        }

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