On Tue, 12 May 2026, Ruslan Bukin wrote:
The branch main has been updated by br:
URL:
https://cgit.FreeBSD.org/src/commit/?id=bcecad2c24aa500913559c00f1be8b364a3ff150
commit bcecad2c24aa500913559c00f1be8b364a3ff150
Author: Ruslan Bukin <[email protected]>
AuthorDate: 2026-05-12 10:09:04 +0000
Commit: Ruslan Bukin <[email protected]>
CommitDate: 2026-05-12 10:11:32 +0000
riscv: IOMMU support
Support for RISC-V IOMMU spec v1.0.1 (ratified)
https://github.com/riscv-non-isa/riscv-iommu
Supports translation for PCI devices only.
Supports 1 or 2-level device-directory-table (DDT).
Supports SV39 and SV48 virtual memory system (on per-device basis).
Supports both "standard" and "extended" device-context (DC) structure.
Supports "bypass" mode to disable translation for a particular device.
Supports WSI (Wire-Signalled Interrupts) only.
This includes both PCI-bus and FDT attachment drivers.
Note in case of PCI-bus attachment, interrupts are not available. In this
case no error report is provided in case of translation fault. Otherwise
interrupts are not needed.
Differential Revision: https://reviews.freebsd.org/D55922
---
sys/conf/files.riscv | 9 +
sys/riscv/conf/GENERIC | 1 +
sys/riscv/include/bus_dma_impl.h | 3 +
sys/riscv/include/iommu.h | 10 +
sys/riscv/iommu/iommu.c | 1351 ++++++++++++++++++++++++++++++++++++++
sys/riscv/iommu/iommu.h | 359 ++++++++++
sys/riscv/iommu/iommu_fdt.c | 145 ++++
sys/riscv/iommu/iommu_frontend.c | 505 ++++++++++++++
sys/riscv/iommu/iommu_frontend.h | 38 ++
sys/riscv/iommu/iommu_if.m | 147 +++++
sys/riscv/iommu/iommu_pci.c | 172 +++++
sys/riscv/iommu/iommu_pmap.c | 629 ++++++++++++++++++
sys/riscv/iommu/iommu_pmap.h | 49 ++
13 files changed, 3418 insertions(+)
There are some accesses to sp_resident_count which are not guarded by
INVARIANTS which makes kernel compiles fail.
--
Bjoern A. Zeeb r15:7
