The branch main has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=698c3b0ce1e788415173639366ae89ae7b7903ca
commit 698c3b0ce1e788415173639366ae89ae7b7903ca Author: Kevin Bowling <[email protected]> AuthorDate: 2026-08-11 15:21:49 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2026-08-11 15:29:03 +0000 e1000: Add Nova Lake I219 support Add support for future client platform MFC after: 1 week --- sys/dev/e1000/e1000_api.c | 6 +++++- sys/dev/e1000/e1000_hw.h | 3 +++ sys/dev/e1000/e1000_ich8lan.c | 7 +++++++ sys/dev/e1000/if_em.c | 9 +++++++++ 4 files changed, 24 insertions(+), 1 deletion(-) diff --git a/sys/dev/e1000/e1000_api.c b/sys/dev/e1000/e1000_api.c index 6c6cb999f29f..c8460d977278 100644 --- a/sys/dev/e1000/e1000_api.c +++ b/sys/dev/e1000/e1000_api.c @@ -364,6 +364,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) case E1000_DEV_ID_PCH_PTP_I219_V27: mac->type = e1000_pch_ptp; break; + case E1000_DEV_ID_PCH_NVL_I219_LM29: + case E1000_DEV_ID_PCH_NVL_I219_V29: + mac->type = e1000_pch_nvp; + break; case E1000_DEV_ID_82575EB_COPPER: case E1000_DEV_ID_82575EB_FIBER_SERDES: case E1000_DEV_ID_82575GB_QUAD_COPPER: @@ -521,6 +525,7 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: e1000_init_function_pointers_ich8lan(hw); break; case e1000_82575: @@ -1448,4 +1453,3 @@ void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw) if (hw->mac.ops.shutdown_serdes) hw->mac.ops.shutdown_serdes(hw); } - diff --git a/sys/dev/e1000/e1000_hw.h b/sys/dev/e1000/e1000_hw.h index 5e918ef83263..0bd99778ba01 100644 --- a/sys/dev/e1000/e1000_hw.h +++ b/sys/dev/e1000/e1000_hw.h @@ -190,6 +190,8 @@ struct e1000_hw; #define E1000_DEV_ID_PCH_PTP_I219_V26 0x57B6 #define E1000_DEV_ID_PCH_PTP_I219_LM27 0x57B7 #define E1000_DEV_ID_PCH_PTP_I219_V27 0x57B8 +#define E1000_DEV_ID_PCH_NVL_I219_LM29 0x57B9 +#define E1000_DEV_ID_PCH_NVL_I219_V29 0x57BA #define E1000_DEV_ID_82576 0x10C9 #define E1000_DEV_ID_82576_FIBER 0x10E6 #define E1000_DEV_ID_82576_SERDES 0x10E7 @@ -282,6 +284,7 @@ enum e1000_mac_type { e1000_pch_adp, e1000_pch_mtp, e1000_pch_ptp, + e1000_pch_nvp, e1000_82575, e1000_82576, e1000_82580, diff --git a/sys/dev/e1000/e1000_ich8lan.c b/sys/dev/e1000/e1000_ich8lan.c index 3102505faa15..32cd5a4532fc 100644 --- a/sys/dev/e1000/e1000_ich8lan.c +++ b/sys/dev/e1000/e1000_ich8lan.c @@ -352,6 +352,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: if (e1000_phy_is_accessible_pchlan(hw)) break; @@ -505,6 +506,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: /* In case the PHY needs to be in mdio slow mode, * set slow mode and try to get the PHY id again. */ @@ -808,6 +810,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: /* multicast address update for pch2 */ mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_pch2lan; @@ -1854,6 +1857,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: hw->phy.ops.init_params = e1000_init_phy_params_pchlan; break; default: @@ -2314,6 +2318,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; break; default: @@ -3440,6 +3445,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: bank1_offset = nvm->flash_bank_size; act_offset = E1000_ICH_NVM_SIG_WORD; @@ -4415,6 +4421,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: word = NVM_COMPAT; valid_csum_mask = NVM_COMPAT_VALID_CSUM; break; diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c index 80ee8095fb83..2a7b3f4e3bfb 100644 --- a/sys/dev/e1000/if_em.c +++ b/sys/dev/e1000/if_em.c @@ -316,6 +316,10 @@ static const pci_vendor_info_t em_vendor_info_array[] = "Intel(R) I219-LM PTP(27)"), PVID(0x8086, E1000_DEV_ID_PCH_PTP_I219_V27, "Intel(R) I219-V PTP(27)"), + PVID(0x8086, E1000_DEV_ID_PCH_NVL_I219_LM29, + "Intel(R) I219-LM NVL(29)"), + PVID(0x8086, E1000_DEV_ID_PCH_NVL_I219_V29, + "Intel(R) I219-V NVL(29)"), /* required last entry */ PVID_END }; @@ -1769,6 +1773,7 @@ em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: case e1000_82574: case e1000_82583: case e1000_80003es2lan: @@ -3647,6 +3652,7 @@ em_reset(if_ctx_t ctx) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: pba = E1000_PBA_26K; break; case e1000_82575: @@ -3760,6 +3766,7 @@ em_reset(if_ctx_t ctx) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: hw->fc.high_water = 0x5C20; hw->fc.low_water = 0x5048; hw->fc.pause_time = 0xFFFF; @@ -4196,6 +4203,7 @@ em_legacy_txdctl(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: /* Preserve the required bit set by the integrated shared code. */ txdctl |= (1U << 22); break; @@ -4528,6 +4536,7 @@ em_integrated_jumbo_rx(struct e1000_hw *hw) case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_ptp: + case e1000_pch_nvp: return (true); default: return (false);
