Felix-Gong opened a new pull request, #3355: URL: https://github.com/apache/brpc/pull/3355
## Summary Replace mutex-based fallback with seqlock implementation for RISC-V platform, bringing it in line with x86 (SSE) and ARM (NEON) lock-free implementations. ## Changes - Implement seqlock-based atomic 128-bit load/store for RISC-V - Use `fence` instructions for proper memory ordering - Maintain backward compatibility with x86/ARM (no changes to existing code paths) ## Seqlock Algorithm - **Reader**: read sequence → read data → verify sequence, retry if stale - **Writer**: increment sequence → write data → increment sequence - All memory accesses use `fence r, rw` (acquire) and `fence w, w` (release) for ordering ## Performance Improvement Tested on SOPHGO SG2044 (RISC-V rv64gcv): - `bthread_start_urgent` latency: ~1.5-2% reduction - `adding_func` throughput: ~25% improvement (541ns vs 722ns) ## Test Plan - [x] RISC-V cross-compilation verification - [x] Native compilation on RISC-V server - [x] Official brpc unit tests (bthread_unittest, test_butil, brpc_server_unittest, etc.) - [x] Performance benchmark on RISC-V hardware ## Notes - All changes are wrapped in `#elif defined(__riscv)` preprocessor guards - x86/ARM behavior is completely unchanged - The `_seq` member is added to `AtomicInteger128` class but only used on RISC-V (other platforms have `(void)_seq;` to suppress warnings) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected] --------------------------------------------------------------------- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
