From: Jerin Jacob <jer...@marvell.com> Optimized configuration for Marvell octeontx2 SoC. Update meson build to support Marvell octeontx2 SoC.
Signed-off-by: Jerin Jacob <jer...@marvell.com> Signed-off-by: Pavan Nikhilesh <pbhagavat...@marrvell.com> --- config/arm/meson.build | 10 +++++- config/defconfig_arm64-octeontx2-linuxapp-gcc | 18 ++++++++++ mk/machine/octeontx2/rte.vars.mk | 34 +++++++++++++++++++ 3 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 config/defconfig_arm64-octeontx2-linuxapp-gcc create mode 100644 mk/machine/octeontx2/rte.vars.mk diff --git a/config/arm/meson.build b/config/arm/meson.build index aca285b6a..8086357a1 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -60,6 +60,13 @@ flags_thunderx2_extra = [ ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true]] +flags_octeontx2_extra = [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 24], + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], + ['RTE_LIBRTE_VHOST_NUMA', false], + ['RTE_EAL_IGB_UIO', false]] machine_args_generic = [ ['default', ['-march=armv8-a+crc+crypto']], @@ -77,7 +84,8 @@ machine_args_cavium = [ ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]] + ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra], + ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] diff --git a/config/defconfig_arm64-octeontx2-linuxapp-gcc b/config/defconfig_arm64-octeontx2-linuxapp-gcc new file mode 100644 index 000000000..9a99eada1 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linuxapp-gcc @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +#include "defconfig_arm64-armv8a-linuxapp-gcc" + +CONFIG_RTE_MACHINE="octeontx2" + +CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_MAX_NUMA_NODES=1 +CONFIG_RTE_MAX_LCORE=24 + +# Doesn't support NUMA +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_LIBRTE_VHOST_NUMA=n + +# Recommend to use VFIO as co-processors needs SMMU/IOMMU +CONFIG_RTE_EAL_IGB_UIO=n diff --git a/mk/machine/octeontx2/rte.vars.mk b/mk/machine/octeontx2/rte.vars.mk new file mode 100644 index 000000000..e209cf492 --- /dev/null +++ b/mk/machine/octeontx2/rte.vars.mk @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +# +# machine: +# +# - can define ARCH variable (overridden by cmdline value) +# - can define CROSS variable (overridden by cmdline value) +# - define MACHINE_CFLAGS variable (overridden by cmdline value) +# - define MACHINE_LDFLAGS variable (overridden by cmdline value) +# - define MACHINE_ASFLAGS variable (overridden by cmdline value) +# - can define CPU_CFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_LDFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_ASFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - may override any previously defined variable +# + +# ARCH = +# CROSS = +# MACHINE_CFLAGS = +# MACHINE_LDFLAGS = +# MACHINE_ASFLAGS = +# CPU_CFLAGS = +# CPU_LDFLAGS = +# CPU_ASFLAGS = + +include $(RTE_SDK)/mk/rte.helper.mk + +MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=armv8.2-a+crc+crypto+lse) +MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2) -- 2.20.1