> -----Original Message-----
> From: pbhagavat...@marvell.com <pbhagavat...@marvell.com>
> Sent: Sunday, June 2, 2019 12:24 AM
> To: Jerin Jacob Kollanukkaran <jer...@marvell.com>; Pavan Nikhilesh
> Bhagavatula <pbhagavat...@marvell.com>
> Cc: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 36/44] event/octeontx2: add TIM bucket operations
>
> From: Pavan Nikhilesh <pbhagavat...@marvell.com>
>
> Add TIM bucket operations used for event timer arm and cancel.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com>
> ---
> drivers/event/octeontx2/Makefile | 1 +
> drivers/event/octeontx2/meson.build | 1 +
> drivers/event/octeontx2/otx2_tim_evdev.h | 28 ++++++
> drivers/event/octeontx2/otx2_tim_worker.c | 7 ++
> drivers/event/octeontx2/otx2_tim_worker.h | 111 ++++++++++++++++++++++
> 5 files changed, 148 insertions(+)
> create mode 100644 drivers/event/octeontx2/otx2_tim_worker.c
> create mode 100644 drivers/event/octeontx2/otx2_tim_worker.h
>
> diff --git a/drivers/event/octeontx2/Makefile
> b/drivers/event/octeontx2/Makefile
> index 6f8d9fe2f..d01da6b11 100644
> --- a/drivers/event/octeontx2/Makefile
> +++ b/drivers/event/octeontx2/Makefile
> @@ -32,6 +32,7 @@ LIBABIVER := 1
>
> SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) +=
> otx2_worker_dual.c
> SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) +=
> otx2_tim_worker.c
> SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
> SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) +=
> otx2_evdev_adptr.c
> SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) +=
> otx2_tim_evdev.c diff --git a/drivers/event/octeontx2/meson.build
> b/drivers/event/octeontx2/meson.build
> index c709b5e69..bdb5beed6 100644
> --- a/drivers/event/octeontx2/meson.build
> +++ b/drivers/event/octeontx2/meson.build
> @@ -9,6 +9,7 @@ sources = files('otx2_worker.c',
> 'otx2_evdev_irq.c',
> 'otx2_evdev_selftest.c',
> 'otx2_tim_evdev.c',
> + 'otx2_tim_worker.c'
> )
>
> allow_experimental_apis = true
> diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h
> b/drivers/event/octeontx2/otx2_tim_evdev.h
> index 5d183b8b2..4034f1a8b 100644
> --- a/drivers/event/octeontx2/otx2_tim_evdev.h
> +++ b/drivers/event/octeontx2/otx2_tim_evdev.h
> @@ -25,6 +25,34 @@
> #define TIM_LF_RAS_INT_ENA_W1S (0x310)
> #define TIM_LF_RAS_INT_ENA_W1C (0x318)
>
> +#define TIM_CTL1_W0_S_BUCKET 20
> +#define TIM_CTL1_W0_M_BUCKET ((1ull << (40 - 20)) - 1)
> +
> +#define TIM_BUCKET_W1_S_NUM_ENTRIES (0) /*Shift*/
> +#define TIM_BUCKET_W1_M_NUM_ENTRIES ((1ull << (32 - 0)) - 1)
> +#define TIM_BUCKET_W1_S_SBT (32)
> +#define TIM_BUCKET_W1_M_SBT ((1ull << (33 - 32)) - 1)
> +#define TIM_BUCKET_W1_S_HBT (33)
> +#define TIM_BUCKET_W1_M_HBT ((1ull << (34 - 33)) - 1)
> +#define TIM_BUCKET_W1_S_BSK (34)
> +#define TIM_BUCKET_W1_M_BSK ((1ull << (35 - 34)) - 1)
> +#define TIM_BUCKET_W1_S_LOCK (40)
> +#define TIM_BUCKET_W1_M_LOCK ((1ull << (48 - 40)) - 1)
> +#define TIM_BUCKET_W1_S_CHUNK_REMAINDER (48)
> +#define TIM_BUCKET_W1_M_CHUNK_REMAINDER ((1ull << (64 - 48)) - 1)
It is possible to replace the hardcoding value to appropriate TIM_BUCKET_W1_*
value.
