15/07/2020 13:21, Xu, Rosen: > From: Tianfei Zhang <[email protected]> > > Add fecmode setting on NIOS SPI primary initialization. > this SPI is shared by NIOS core inside FPGA, NIOS will use this SPI primary > to do some one-time initialization after power up, and then release the > control to DPDK. > > Fix the timeout initialization for polling the NIOS_INIT_DONE. > > Fixes: bc44402f ("raw/ifpga/base: configure FEC mode") > Cc: [email protected] > > Signed-off-by: Tianfei Zhang <[email protected]> > > Acked-by: Rosen Xu <[email protected]>
Series applied, thanks
