Since rte_atomicXX APIs are not allowed to be used, use C11 atomic
builtins for power in use state update.
Signed-off-by: Phil Yang <phil.y...@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.w...@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
---
lib/librte_power/power_acpi_cpufreq.c | 45 +++++++++++++++++++++++++--------
lib/librte_power/power_pstate_cpufreq.c | 45 +++++++++++++++++++++++++--------
2 files changed, 70 insertions(+), 20 deletions(-)
diff --git a/lib/librte_power/power_acpi_cpufreq.c
b/lib/librte_power/power_acpi_cpufreq.c
index 583815a..84a9d75 100644
--- a/lib/librte_power/power_acpi_cpufreq.c
+++ b/lib/librte_power/power_acpi_cpufreq.c
@@ -12,7 +12,6 @@
#include <signal.h>
#include <limits.h>
-#include <rte_atomic.h>
#include <rte_memcpy.h>
#include <rte_memory.h>
#include <rte_string_fns.h>
@@ -86,7 +85,7 @@ struct rte_power_info {
FILE *f; /**< FD of scaling_setspeed */
char governor_ori[32]; /**< Original governor name */
uint32_t curr_idx; /**< Freq index in freqs array */
- volatile uint32_t state; /**< Power in use state */
+ uint32_t state; /**< Power in use state */
uint16_t turbo_available; /**< Turbo Boost available */
uint16_t turbo_enable; /**< Turbo Boost enable/disable */
} __rte_cache_aligned;
@@ -300,6 +299,7 @@ int
power_acpi_cpufreq_init(unsigned int lcore_id)
{
struct rte_power_info *pi;
+ uint32_t exp_state;
if (lcore_id >= RTE_MAX_LCORE) {
RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
@@ -308,8 +308,16 @@ power_acpi_cpufreq_init(unsigned int lcore_id)
}
pi = &lcore_power_info[lcore_id];
- if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
- == 0) {
+ exp_state = POWER_IDLE;
+ /* The power in use state works as a guard variable between
+ * the CPU frequency control initialization and exit process.
+ * The ACQUIRE memory ordering here pairs with the RELEASE
+ * ordering below as lock to make sure the frequency operations
+ * in the critical section are done under the correct state.
+ */
+ if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+ POWER_ONGOING, 0,
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
"in use\n", lcore_id);
return -1;
@@ -346,12 +354,16 @@ power_acpi_cpufreq_init(unsigned int lcore_id)
RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
"power management\n", lcore_id);
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return 0;
fail:
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return -1;
}
@@ -408,6 +420,7 @@ int
power_acpi_cpufreq_exit(unsigned int lcore_id)
{
struct rte_power_info *pi;
+ uint32_t exp_state;
if (lcore_id >= RTE_MAX_LCORE) {
RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
@@ -415,8 +428,16 @@ power_acpi_cpufreq_exit(unsigned int lcore_id)
return -1;
}
pi = &lcore_power_info[lcore_id];
- if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
- == 0) {
+ exp_state = POWER_USED;
+ /* The power in use state works as a guard variable between
+ * the CPU frequency control initialization and exit process.
+ * The ACQUIRE memory ordering here pairs with the RELEASE
+ * ordering below as lock to make sure the frequency operations
+ * in the critical section are done under the correct state.
+ */
+ if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+ POWER_ONGOING, 0,
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
"not used\n", lcore_id);
return -1;
@@ -436,12 +457,16 @@ power_acpi_cpufreq_exit(unsigned int lcore_id)
RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
"'userspace' mode and been set back to the "
"original\n", lcore_id);
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return 0;
fail:
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return -1;
}
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 2526441..e3126d3 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -14,7 +14,6 @@
#include <errno.h>
#include <inttypes.h>
-#include <rte_atomic.h>
#include <rte_memcpy.h>
#include <rte_memory.h>
#include <rte_string_fns.h>
@@ -100,7 +99,7 @@ struct pstate_power_info {
uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
uint32_t sys_max_freq; /**< system wide max freq */
uint32_t core_base_freq; /**< core base freq */
- volatile uint32_t state; /**< Power in use state */
+ uint32_t state; /**< Power in use state */
uint16_t turbo_available; /**< Turbo Boost available */
uint16_t turbo_enable; /**< Turbo Boost enable/disable */
uint16_t priority_core; /**< High Performance core */
@@ -542,6 +541,7 @@ int
power_pstate_cpufreq_init(unsigned int lcore_id)
{
struct pstate_power_info *pi;
+ uint32_t exp_state;
if (lcore_id >= RTE_MAX_LCORE) {
RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
@@ -550,8 +550,16 @@ power_pstate_cpufreq_init(unsigned int lcore_id)
}
pi = &lcore_power_info[lcore_id];
- if (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)
- == 0) {
+ exp_state = POWER_IDLE;
+ /* The power in use state works as a guard variable between
+ * the CPU frequency control initialization and exit process.
+ * The ACQUIRE memory ordering here pairs with the RELEASE
+ * ordering below as lock to make sure the frequency operations
+ * in the critical section are done under the correct state.
+ */
+ if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+ POWER_ONGOING, 0,
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
"in use\n", lcore_id);
return -1;
@@ -588,12 +596,16 @@ power_pstate_cpufreq_init(unsigned int lcore_id)
RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
"power management\n", lcore_id);
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return 0;
fail:
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return -1;
}
@@ -602,6 +614,7 @@ int
power_pstate_cpufreq_exit(unsigned int lcore_id)
{
struct pstate_power_info *pi;
+ uint32_t exp_state;
if (lcore_id >= RTE_MAX_LCORE) {
RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
@@ -610,8 +623,16 @@ power_pstate_cpufreq_exit(unsigned int lcore_id)
}
pi = &lcore_power_info[lcore_id];
- if (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)
- == 0) {
+ exp_state = POWER_USED;
+ /* The power in use state works as a guard variable between
+ * the CPU frequency control initialization and exit process.
+ * The ACQUIRE memory ordering here pairs with the RELEASE
+ * ordering below as lock to make sure the frequency operations
+ * in the critical section are under done the correct state.
+ */
+ if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+ POWER_ONGOING, 0,
+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
"not used\n", lcore_id);
return -1;
@@ -633,12 +654,16 @@ power_pstate_cpufreq_exit(unsigned int lcore_id)
RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
"'performance' mode and been set back to the "
"original\n", lcore_id);
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return 0;
fail:
- rte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);
+ exp_state = POWER_ONGOING;
+ __atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
+ 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
return -1;
}
--
2.7.4
