> -----Original Message----- > From: Ciara Power <ciara.po...@intel.com> > Sent: Wednesday, September 30, 2020 16:04 > To: dev@dpdk.org > Cc: Ciara Power <ciara.po...@intel.com>; Matan Azrad > <ma...@mellanox.com>; Shahaf Shuler <shah...@mellanox.com>; > Viacheslav Ovsiienko <viachesl...@mellanox.com> > Subject: [PATCH v3 12/18] net/mlx5: add checks for max SIMD bitwidth > > When choosing a vector path to take, an extra condition must be satisfied to > ensure the max SIMD bitwidth allows for the CPU enabled path. > > Cc: Matan Azrad <ma...@mellanox.com> > Cc: Shahaf Shuler <shah...@mellanox.com> > Cc: Viacheslav Ovsiienko <viachesl...@mellanox.com> > > Signed-off-by: Ciara Power <ciara.po...@intel.com> Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
Looks good to me, thank you, Ciara. With best regards, Slava
