Update microcode completion code handling to update the required mbuf &
crypto op flags. IP checksum good case is now reported by specific
microcode completion code.
Signed-off-by: Anoob Joseph <ano...@marvell.com>
---
drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 59 ++++++++++---------------------
drivers/crypto/cnxk/cn10k_ipsec.c | 1 -
drivers/crypto/cnxk/cn10k_ipsec.h | 1 -
3 files changed, 18 insertions(+), 43 deletions(-)
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 1905ea3..d217bbf 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -50,8 +50,7 @@ cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct
rte_crypto_op *op)
static __rte_always_inline int __rte_hot
cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
- struct cn10k_sec_session *sess,
- struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
+ struct cn10k_sec_session *sess, struct cpt_inst_s *inst)
{
struct rte_crypto_sym_op *sym_op = op->sym;
struct cn10k_ipsec_sa *sa;
@@ -71,10 +70,8 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct
rte_crypto_op *op,
if (sa->is_outbound)
ret = process_outb_sa(&qp->lf, op, sa, inst);
- else {
- infl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;
+ else
ret = process_inb_sa(op, sa, inst);
- }
return ret;
}
@@ -127,8 +124,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct
rte_crypto_op *ops[],
if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
sec_sess = get_sec_session_private_data(
sym_op->sec_session);
- ret = cpt_sec_inst_fill(qp, op, sec_sess, infl_req,
- &inst[0]);
+ ret = cpt_sec_inst_fill(qp, op, sec_sess, &inst[0]);
if (unlikely(ret))
return 0;
w7 = sec_sess->sa.inst.w7;
@@ -346,52 +342,34 @@ static inline void
cn10k_cpt_sec_post_process(struct rte_crypto_op *cop,
struct cpt_cn10k_res_s *res)
{
- struct rte_mbuf *m = cop->sym->m_src;
+ struct rte_mbuf *mbuf = cop->sym->m_src;
const uint16_t m_len = res->rlen;
- m->data_len = m_len;
- m->pkt_len = m_len;
-}
-
-static inline void
-cn10k_cpt_sec_ucc_process(struct rte_crypto_op *cop,
- struct cpt_inflight_req *infl_req,
- const uint8_t uc_compcode)
-{
- struct cn10k_sec_session *sess;
- struct cn10k_ipsec_sa *sa;
- struct rte_mbuf *mbuf;
-
- if (uc_compcode == ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST)
- cop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;
-
- if (!(infl_req->op_flags & CPT_OP_FLAGS_IPSEC_DIR_INBOUND))
- return;
-
- sess = get_sec_session_private_data(cop->sym->sec_session);
- sa = &sess->sa;
+ mbuf->data_len = m_len;
+ mbuf->pkt_len = m_len;
- mbuf = cop->sym->m_src;
-
- switch (uc_compcode) {
+ switch (res->uc_compcode) {
case ROC_IE_OT_UCC_SUCCESS:
- if (sa->ip_csum_enable)
- mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM:
mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM:
- mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
- if (sa->ip_csum_enable)
- mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+ mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+ RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM:
- mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
- if (sa->ip_csum_enable)
- mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+ mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD |
+ RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+ break;
+ case ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM:
+ mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+ break;
+ case ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST:
+ cop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;
break;
default:
+ plt_dp_err("Success with unknown microcode completion code");
break;
}
}
@@ -412,7 +390,6 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
if (likely(compcode == CPT_COMP_WARN)) {
/* Success with additional info */
- cn10k_cpt_sec_ucc_process(cop, infl_req, uc_compcode);
cn10k_cpt_sec_post_process(cop, res);
} else {
cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c
b/drivers/crypto/cnxk/cn10k_ipsec.c
index a93c211..7f4ccaf 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -201,7 +201,6 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct
roc_cpt_lf *lf,
if (ipsec_xfrm->options.ip_csum_enable) {
param1.s.ip_csum_disable =
ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;
- sa->ip_csum_enable = true;
}
/* Disable L4 checksum verification by default */
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.h
b/drivers/crypto/cnxk/cn10k_ipsec.h
index cc7ca19..647a71c 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec.h
@@ -19,7 +19,6 @@ struct cn10k_ipsec_sa {
uint16_t max_extended_len;
uint16_t iv_offset;
uint8_t iv_length;
- bool ip_csum_enable;
bool is_outbound;
/**
--
2.7.4
