Hi,
> -----Original Message-----
> From: Michael Baum <michae...@nvidia.com>
> Sent: Wednesday, February 14, 2024 3:30 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <ma...@nvidia.com>; Dariusz Sosnowski
> <dsosnow...@nvidia.com>; Raslan Darawsheh <rasl...@nvidia.com>; Slava
> Ovsiienko <viachesl...@nvidia.com>; Ori Kam <or...@nvidia.com>; Suanming
> Mou <suanmi...@nvidia.com>
> Subject: [PATCH v5 3/3] net/mlx5/hws: add compare ESP sequence number
> support
>
> Add support for compare item with "RTE_FLOW_FIELD_ESP_SEQ_NUM" field.
Small comment, please don't forget to add the new supported comparison field to
rel_notes.
>
> Signed-off-by: Michael Baum <michae...@nvidia.com>
Acked-by: Suanming Mou <suanmi...@nvidia.com>
> ---
> doc/guides/nics/mlx5.rst | 1 +
> drivers/net/mlx5/hws/mlx5dr_definer.c | 22 ++++++++++++++++++++--
> drivers/net/mlx5/mlx5_flow_hw.c | 3 +++
> 3 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index
> 43ef8a99dc..b793f1ef58 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -823,6 +823,7 @@ Limitations
> - Only single item is supported per pattern template.
> - Only 32-bit comparison is supported or 16-bits for random field.
> - Only supported for ``RTE_FLOW_FIELD_META``, ``RTE_FLOW_FIELD_TAG``,
> + ``RTE_FLOW_FIELD_ESP_SEQ_NUM``,
> ``RTE_FLOW_FIELD_RANDOM`` and ``RTE_FLOW_FIELD_VALUE``.
> - The field type ``RTE_FLOW_FIELD_VALUE`` must be the base (``b``) field.
> - The field type ``RTE_FLOW_FIELD_RANDOM`` can only be compared with diff
> --git a/drivers/net/mlx5/hws/mlx5dr_definer.c
> b/drivers/net/mlx5/hws/mlx5dr_definer.c
> index 2d86175ca2..b29d7451e7 100644
> --- a/drivers/net/mlx5/hws/mlx5dr_definer.c
> +++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
> @@ -396,10 +396,20 @@ mlx5dr_definer_compare_base_value_set(const void
> *item_spec,
>
> value = (const uint32_t *)&b->value[0];
>
> - if (a->field == RTE_FLOW_FIELD_RANDOM)
> + switch (a->field) {
> + case RTE_FLOW_FIELD_RANDOM:
> *base = htobe32(*value << 16);
> - else
> + break;
> + case RTE_FLOW_FIELD_TAG:
> + case RTE_FLOW_FIELD_META:
> *base = htobe32(*value);
> + break;
> + case RTE_FLOW_FIELD_ESP_SEQ_NUM:
> + *base = *value;
> + break;
> + default:
> + break;
> + }
>
> MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, base0, 1); } @@ -2887,6
> +2897,14 @@ mlx5dr_definer_conv_item_compare_field(const struct
> rte_flow_field_data *f,
> fc->compare_idx = dw_offset;
> DR_CALC_SET_HDR(fc, random_number, random_number);
> break;
> + case RTE_FLOW_FIELD_ESP_SEQ_NUM:
> + fc = &cd-
> >fc[MLX5DR_DEFINER_FNAME_ESP_SEQUENCE_NUMBER];
> + fc->item_idx = item_idx;
> + fc->tag_set = &mlx5dr_definer_compare_set;
> + fc->tag_mask_set = &mlx5dr_definer_ones_set;
> + fc->compare_idx = dw_offset;
> + DR_CALC_SET_HDR(fc, ipsec, sequence_number);
> + break;
> default:
> DR_LOG(ERR, "%u field is not supported", f->field);
> goto err_notsup;
> diff --git a/drivers/net/mlx5/mlx5_flow_hw.c
> b/drivers/net/mlx5/mlx5_flow_hw.c index b5741f0817..4d6fb489b2 100644
> --- a/drivers/net/mlx5/mlx5_flow_hw.c
> +++ b/drivers/net/mlx5/mlx5_flow_hw.c
> @@ -6725,6 +6725,7 @@ flow_hw_item_compare_field_validate(enum
> rte_flow_field_id arg_field,
> switch (arg_field) {
> case RTE_FLOW_FIELD_TAG:
> case RTE_FLOW_FIELD_META:
> + case RTE_FLOW_FIELD_ESP_SEQ_NUM:
> break;
> case RTE_FLOW_FIELD_RANDOM:
> if (base_field == RTE_FLOW_FIELD_VALUE) @@ -6743,6 +6744,7
> @@ flow_hw_item_compare_field_validate(enum rte_flow_field_id arg_field,
> case RTE_FLOW_FIELD_TAG:
> case RTE_FLOW_FIELD_META:
> case RTE_FLOW_FIELD_VALUE:
> + case RTE_FLOW_FIELD_ESP_SEQ_NUM:
> break;
> default:
> return rte_flow_error_set(error, ENOTSUP, @@ -6759,6 +6761,7
> @@ flow_hw_item_compare_width_supported(enum rte_flow_field_id field)
> switch (field) {
> case RTE_FLOW_FIELD_TAG:
> case RTE_FLOW_FIELD_META:
> + case RTE_FLOW_FIELD_ESP_SEQ_NUM:
> return 32;
> case RTE_FLOW_FIELD_RANDOM:
> return 16;
> --
> 2.25.1
