+ Bruce for feedback on x86 architecture > On May 16, 2024, at 10:30 PM, Stephen Hemminger <step...@networkplumber.org> > wrote: > > On Fri, 17 May 2024 02:45:12 +0000 > Honnappa Nagarahalli <honnappa.nagaraha...@arm.com> wrote: > >>> + * A counter is 64 bit value that is safe from split read/write >>> + * on 32 bit platforms. It assumes that only one cpu at a time >> If we are defining the counter in this manner, then implementation cannot be >> generic. I think architectures will have constraints if they have to ensure >> the 64b variables are not split. >> >> I think we at least need the counter to be aligned on 8B boundary to have >> generic code. > > The C standard has always guaranteed that read and write to unsigned log will > not be split. As I understand, this is true only if the variable is an atomic variable. If not, there is no difference between atomic variables and non-atomic variables.
> Therefore if arch is 64 bit native there is no need for atomics At least on ARM architecture, if the variable is not aligned on 8B boundary, the load or store are not atomic. I am sure it is the same on other architectures. Bruce, any comments for x86?
