From: Lukasz Cieplicki <lukaszx.ciepli...@intel.com>
Add defines related to GL_RXEER1 register. GL_RXEER1 register is composed
of two 32 bits registers (H and L). Receive Error Counter 1
(GL_RXERR1{H,L}) contains count of dropped packets due to one of the
following exceptions:
- Packet size is larger than RXMAX of the queue
- Internal Receive queue context error (e.g. when reset is in progress)
- Receive descriptor Unsupported Request on the PCI or internal Dummy
completion (e.g. when reset is in progress)
The define for L part was already present, but define for H part was
missing in the base driver, so it was previously added to ethdev
manually. Add the missing define to i40e_register.h and remove it from
i40e_ethdev. Also, enable reading this register in i40e_regs.
Additionally, add rx_err1 member to i40e_hw_port_stats, remove the
(previously manually added) rx_err1 from i40e_pf, and replace all usages
of rx_err1 with one from the base driver stats struct.
Signed-off-by: Lukasz Cieplicki <lukaszx.ciepli...@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
---
drivers/net/i40e/base/i40e_register.h | 12 ++++++++----
drivers/net/i40e/base/i40e_type.h | 1 +
drivers/net/i40e/i40e_ethdev.c | 21 +++++++++++----------
drivers/net/i40e/i40e_ethdev.h | 9 ---------
drivers/net/i40e/i40e_regs.h | 3 ++-
5 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_register.h
b/drivers/net/i40e/base/i40e_register.h
index b9da69484c..55f671c3c5 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -2391,10 +2391,14 @@
#define I40E_GL_FCOERPDC_MAX_INDEX 143
#define I40E_GL_FCOERPDC_FCOERPDC_SHIFT 0
#define I40E_GL_FCOERPDC_FCOERPDC_MASK I40E_MASK(0xFFFFFFFF,
I40E_GL_FCOERPDC_FCOERPDC_SHIFT)
-#define I40E_GL_RXERR1_L(_i) (0x00318000 + ((_i) * 8)) /*
_i=0...143 */ /* Reset: CORER */
-#define I40E_GL_RXERR1_L_MAX_INDEX 143
-#define I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT 0
-#define I40E_GL_RXERR1_L_FCOEDIFRC_MASK I40E_MASK(0xFFFFFFFF,
I40E_GL_RXERR1_L_FCOEDIFRC_SHIFT)
+#define I40E_GL_RXERR1H(_i) (0x00318004 + ((_i) * 8)) /*
_i=0...143 */ /* Reset: CORER */
+#define I40E_GL_RXERR1H_MAX_INDEX 143
+#define I40E_GL_RXERR1H_RXERR1H_SHIFT 0
+#define I40E_GL_RXERR1H_RXERR1H_MASK I40E_MASK(0xFFFFFFFF,
I40E_GL_RXERR1H_RXERR1H_SHIFT)
+#define I40E_GL_RXERR1L(_i) (0x00318000 + ((_i) * 8)) /*
_i=0...143 */ /* Reset: CORER */
+#define I40E_GL_RXERR1L_MAX_INDEX 143
+#define I40E_GL_RXERR1L_RXERR1L_SHIFT 0
+#define I40E_GL_RXERR1L_RXERR1L_MASK I40E_MASK(0xFFFFFFFF,
I40E_GL_RXERR1L_RXERR1L_SHIFT)
#define I40E_GL_RXERR2_L(_i) (0x0031c000 + ((_i) * 8)) /*
_i=0...143 */ /* Reset: CORER */
#define I40E_GL_RXERR2_L_MAX_INDEX 143
#define I40E_GL_RXERR2_L_FCOEDIXAC_SHIFT 0
diff --git a/drivers/net/i40e/base/i40e_type.h
b/drivers/net/i40e/base/i40e_type.h
index 543b4b41dd..48d722c1f0 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1475,6 +1475,7 @@ struct i40e_hw_port_stats {
u64 rx_undersize; /* ruc */
u64 rx_fragments; /* rfc */
u64 rx_oversize; /* roc */
+ u64 rx_err1; /* rxerr1 */
u64 rx_jabber; /* rjc */
u64 tx_size_64; /* ptc64 */
u64 tx_size_127; /* ptc127 */
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 8c93468bfd..feb618ee24 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -542,8 +542,11 @@ static const struct rte_i40e_xstats_name_off
rte_i40e_stats_strings[] = {
{"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
{"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
rx_unknown_protocol)},
- {"rx_size_error_packets", offsetof(struct i40e_pf, rx_err1) -
- offsetof(struct i40e_pf, stats)},
+ /*
+ * all other offsets are against i40e_eth_stats which is first member
+ * in i40e_hw_port_stats, so these offsets are interchangeable
+ */
+ {"rx_size_error_packets", offsetof(struct i40e_hw_port_stats, rx_err1)},
{"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
{"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
{"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
@@ -3285,10 +3288,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct
i40e_hw *hw)
pf->offset_loaded,
&os->eth.rx_unknown_protocol,
&ns->eth.rx_unknown_protocol);
- i40e_stat_update_48(hw, I40E_GL_RXERR1_H(hw->pf_id + I40E_MAX_VF),
- I40E_GL_RXERR1_L(hw->pf_id + I40E_MAX_VF),
- pf->offset_loaded, &pf->rx_err1_offset,
- &pf->rx_err1);
+ i40e_stat_update_48(hw, I40E_GL_RXERR1H(hw->pf_id + I40E_MAX_VF),
+ I40E_GL_RXERR1L(hw->pf_id + I40E_MAX_VF),
+ pf->offset_loaded, &os->rx_err1,
+ &ns->rx_err1);
i40e_stat_update_48_in_64(hw, I40E_GLPRT_GOTCH(hw->port),
I40E_GLPRT_GOTCL(hw->port),
pf->offset_loaded, &os->eth.tx_bytes,
@@ -3489,7 +3492,7 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct
rte_eth_stats *stats)
pf->main_vsi->eth_stats.rx_multicast +
pf->main_vsi->eth_stats.rx_broadcast -
pf->main_vsi->eth_stats.rx_discards -
- pf->rx_err1;
+ ns->rx_err1;
stats->opackets = ns->eth.tx_unicast +
ns->eth.tx_multicast +
ns->eth.tx_broadcast;
@@ -3504,7 +3507,7 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct
rte_eth_stats *stats)
stats->ierrors = ns->crc_errors +
ns->rx_length_errors + ns->rx_undersize +
ns->rx_oversize + ns->rx_fragments + ns->rx_jabber +
- pf->rx_err1;
+ ns->rx_err1;
if (pf->vfs) {
for (i = 0; i < pf->vf_num; i++) {
@@ -6407,8 +6410,6 @@ i40e_pf_setup(struct i40e_pf *pf)
memset(&pf->stats_offset, 0, sizeof(struct i40e_hw_port_stats));
memset(&pf->internal_stats, 0, sizeof(struct i40e_eth_stats));
memset(&pf->internal_stats_offset, 0, sizeof(struct i40e_eth_stats));
- pf->rx_err1 = 0;
- pf->rx_err1_offset = 0;
ret = i40e_pf_get_switch_config(pf);
if (ret != I40E_SUCCESS) {
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 31fc92691e..98213948b4 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -20,13 +20,6 @@
#include "base/i40e_type.h"
#include "base/virtchnl.h"
-/**
- * _i=0...143,
- * counters 0-127 are for the 128 VFs,
- * counters 128-143 are for the 16 PFs
- */
-#define I40E_GL_RXERR1_H(_i) (0x00318004 + ((_i) * 8))
-
#define I40E_AQ_LEN 32
#define I40E_AQ_BUF_SZ 4096
/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
@@ -1128,8 +1121,6 @@ struct i40e_pf {
struct i40e_hw_port_stats stats_offset;
struct i40e_hw_port_stats stats;
struct i40e_mbuf_stats mbuf_stats;
- u64 rx_err1; /* rxerr1 */
- u64 rx_err1_offset;
/* internal packet statistics, it should be excluded from the total */
struct i40e_eth_stats internal_stats_offset;
diff --git a/drivers/net/i40e/i40e_regs.h b/drivers/net/i40e/i40e_regs.h
index 7e94fca5b1..e6f8866e9f 100644
--- a/drivers/net/i40e/i40e_regs.h
+++ b/drivers/net/i40e/i40e_regs.h
@@ -887,7 +887,8 @@ static const struct i40e_reg_info i40e_regs_others[] = {
{I40E_GL_FCOEDDPC(0), 143, 8, 0, 0, "GL_FCOEDDPC"},
{I40E_GL_FCOECRC(0), 143, 8, 0, 0, "GL_FCOECRC"},
{I40E_GL_FCOEPRC(0), 143, 8, 0, 0, "GL_FCOEPRC"},
- {I40E_GL_RXERR1_L(0), 143, 8, 0, 0, "GL_RXERR1_L"},
+ {I40E_GL_RXERR1L(0), 143, 8, 0, 0, "GL_RXERR1L"},
+ {I40E_GL_RXERR1H(0), 143, 8, 0, 0, "GL_RXERR1H"},
{I40E_GL_FCOEDIFEC(0), 143, 8, 0, 0, "GL_FCOEDIFEC"},
{I40E_GL_RXERR2_L(0), 143, 8, 0, 0, "GL_RXERR2_L"},
{I40E_GL_FCOEDWRCL(0), 143, 8, 0, 0, "GL_FCOEDWRCL"},
--
2.43.5
