[PATCH 03/11] common/cnxk: ensure CPTR is 128B aligned

[Tejasree Kondoj]

From: Anoob Joseph <ano...@marvell.com>

Make sure CPTR is 128B aligned.

Signed-off-by: Anoob Joseph <ano...@marvell.com>
---
 drivers/common/cnxk/roc_cpt.c      | 5 +++++
 drivers/common/cnxk/roc_platform.h | 1 +
 2 files changed, 6 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index aba2a49d19..64fa284b9a 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -1174,6 +1174,11 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, 
void *sa_cptr,
        uint64_t *dptr;
        int i;
 
+       if (!plt_is_aligned(sa_cptr, 128)) {
+               plt_err("Context pointer should be 128B aligned");
+               return -EINVAL;
+       }
+
        /* Use this lcore's LMT line as no one else is using it */
        ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
        inst = (struct cpt_inst_s *)lmt_base;
diff --git a/drivers/common/cnxk/roc_platform.h 
b/drivers/common/cnxk/roc_platform.h
index 658bafb935..2b45cc3721 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -185,6 +185,7 @@ plt_thread_is_valid(plt_thread_t thr)
 #define plt_intr_efds_index_set                rte_intr_efds_index_set
 #define plt_intr_elist_index_get       rte_intr_elist_index_get
 #define plt_intr_elist_index_set       rte_intr_elist_index_set
+#define plt_is_aligned                 rte_is_aligned
 
 #define plt_alarm_set   rte_eal_alarm_set
 #define plt_alarm_cancel rte_eal_alarm_cancel
-- 
2.25.1