According to the VFIO interrupt mapping, the interrupt vector id for rxq starts 
from RX_VEC_START.
It doesn't impact the UIO cases.

Signed-off-by: Cunming Liang <cunming.liang at intel.com>
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ec2918c..dbc0cd4 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -4249,7 +4249,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
        struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
        struct ixgbe_hw *hw =
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       uint32_t queue_id, vec = 0;
+       uint32_t queue_id, base = MISC_VEC_ID;
+       uint32_t vec = MISC_VEC_ID;
        uint32_t mask;
        uint32_t gpie;

@@ -4259,6 +4260,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
        if (!rte_intr_dp_is_en(intr_handle))
                return;

+       if (rte_intr_allow_others(intr_handle))
+               vec = base = RX_VEC_START;
+
        /* setup GPIE for MSI-x mode */
        gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
        gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
@@ -4282,23 +4286,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
                /* by default, 1:1 mapping */
                ixgbe_set_ivar_map(hw, 0, queue_id, vec);
                intr_handle->intr_vec[queue_id] = vec;
-               if (vec < intr_handle->nb_efd - 1)
+               if (vec < base + intr_handle->nb_efd - 1)
                        vec++;
        }

        switch (hw->mac.type) {
        case ixgbe_mac_82598EB:
                ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
-                                  intr_handle->max_intr - 1);
+                                  MISC_VEC_ID);
                break;
        case ixgbe_mac_82599EB:
        case ixgbe_mac_X540:
-               ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1);
+               ixgbe_set_ivar_map(hw, -1, 1, MISC_VEC_ID);
                break;
        default:
                break;
        }
-       IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id),
+       IXGBE_WRITE_REG(hw, IXGBE_EITR(MISC_VEC_ID),
                        IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);

        /* set up to autoclear timer, and the vectors */
-- 
2.4.3

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