From: Vidya Sagar Velumuri <vvelum...@marvell.com>
Add ops skeletion for cn20k
Signed-off-by: Vidya Sagar Velumuri <vvelum...@marvell.com>
---
drivers/crypto/cnxk/cn20k_cryptodev.c | 3 +
drivers/crypto/cnxk/cn20k_cryptodev_ops.c | 92 +++++++++++++++++++++++
drivers/crypto/cnxk/cn20k_cryptodev_ops.h | 23 ++++++
drivers/crypto/cnxk/meson.build | 1 +
4 files changed, 119 insertions(+)
create mode 100644 drivers/crypto/cnxk/cn20k_cryptodev_ops.c
create mode 100644 drivers/crypto/cnxk/cn20k_cryptodev_ops.h
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev.c
b/drivers/crypto/cnxk/cn20k_cryptodev.c
index e52336c2b7..980ea7df97 100644
--- a/drivers/crypto/cnxk/cn20k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn20k_cryptodev.c
@@ -11,6 +11,7 @@
#include <rte_pci.h>
#include "cn20k_cryptodev.h"
+#include "cn20k_cryptodev_ops.h"
#include "cnxk_cryptodev.h"
#include "cnxk_cryptodev_capabilities.h"
#include "cnxk_cryptodev_ops.h"
@@ -86,6 +87,8 @@ cn20k_cpt_pci_probe(struct rte_pci_driver *pci_drv
__rte_unused, struct rte_pci_
cnxk_cpt_caps_populate(vf);
+ dev->dev_ops = &cn20k_cpt_ops;
+ dev->driver_id = cn20k_cryptodev_driver_id;
dev->feature_flags = cnxk_cpt_default_ff_get();
dev->qp_depth_used = cnxk_cpt_qp_depth_used;
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
new file mode 100644
index 0000000000..64ab285235
--- /dev/null
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
@@ -0,0 +1,92 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2025 Marvell.
+ */
+
+#include <cryptodev_pmd.h>
+#include <rte_cryptodev.h>
+
+#include "roc_cpt.h"
+#include "roc_idev.h"
+
+#include "cn20k_cryptodev.h"
+#include "cn20k_cryptodev_ops.h"
+#include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_ops.h"
+#include "cnxk_se.h"
+
+#include "rte_pmd_cnxk_crypto.h"
+
+static int
+cn20k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,
void *sess,
+ enum rte_crypto_op_type op_type,
+ enum rte_crypto_op_sess_type sess_type,
void *mdata)
+{
+ (void)dev;
+ (void)sess;
+ (void)op_type;
+ (void)sess_type;
+ (void)mdata;
+
+ return 0;
+}
+
+static void
+cn20k_cpt_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info
*info)
+{
+ (void)dev;
+ (void)info;
+}
+
+static int
+cn20k_sym_get_raw_dp_ctx_size(struct rte_cryptodev *dev __rte_unused)
+{
+ return 0;
+}
+
+static int
+cn20k_sym_configure_raw_dp_ctx(struct rte_cryptodev *dev, uint16_t qp_id,
+ struct rte_crypto_raw_dp_ctx *raw_dp_ctx,
+ enum rte_crypto_op_sess_type sess_type,
+ union rte_cryptodev_session_ctx session_ctx,
uint8_t is_update)
+{
+ (void)dev;
+ (void)qp_id;
+ (void)raw_dp_ctx;
+ (void)sess_type;
+ (void)session_ctx;
+ (void)is_update;
+ return 0;
+}
+
+struct rte_cryptodev_ops cn20k_cpt_ops = {
+ /* Device control ops */
+ .dev_configure = cnxk_cpt_dev_config,
+ .dev_start = cnxk_cpt_dev_start,
+ .dev_stop = cnxk_cpt_dev_stop,
+ .dev_close = cnxk_cpt_dev_close,
+ .dev_infos_get = cn20k_cpt_dev_info_get,
+
+ .stats_get = NULL,
+ .stats_reset = NULL,
+ .queue_pair_setup = cnxk_cpt_queue_pair_setup,
+ .queue_pair_release = cnxk_cpt_queue_pair_release,
+ .queue_pair_reset = cnxk_cpt_queue_pair_reset,
+
+ /* Symmetric crypto ops */
+ .sym_session_get_size = cnxk_cpt_sym_session_get_size,
+ .sym_session_configure = cnxk_cpt_sym_session_configure,
+ .sym_session_clear = cnxk_cpt_sym_session_clear,
+
+ /* Asymmetric crypto ops */
+ .asym_session_get_size = cnxk_ae_session_size_get,
+ .asym_session_configure = cnxk_ae_session_cfg,
+ .asym_session_clear = cnxk_ae_session_clear,
+
+ /* Event crypto ops */
+ .session_ev_mdata_set = cn20k_cpt_crypto_adapter_ev_mdata_set,
+ .queue_pair_event_error_query = cnxk_cpt_queue_pair_event_error_query,
+
+ /* Raw data-path API related operations */
+ .sym_get_raw_dp_ctx_size = cn20k_sym_get_raw_dp_ctx_size,
+ .sym_configure_raw_dp_ctx = cn20k_sym_configure_raw_dp_ctx,
+};
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.h
b/drivers/crypto/cnxk/cn20k_cryptodev_ops.h
new file mode 100644
index 0000000000..d7c3aed22b
--- /dev/null
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2025 Marvell.
+ */
+
+#ifndef _CN20K_CRYPTODEV_OPS_H_
+#define _CN20K_CRYPTODEV_OPS_H_
+
+#include <cryptodev_pmd.h>
+#include <rte_compat.h>
+#include <rte_cryptodev.h>
+#include <rte_eventdev.h>
+
+#if defined(__aarch64__)
+#include "roc_io.h"
+#else
+#include "roc_io_generic.h"
+#endif
+
+#include "cnxk_cryptodev.h"
+
+extern struct rte_cryptodev_ops cn20k_cpt_ops;
+
+#endif /* _CN20K_CRYPTODEV_OPS_H_ */
diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build
index 886bb5c428..0b078b4d06 100644
--- a/drivers/crypto/cnxk/meson.build
+++ b/drivers/crypto/cnxk/meson.build
@@ -18,6 +18,7 @@ sources = files(
'cn10k_ipsec.c',
'cn10k_tls.c',
'cn20k_cryptodev.c',
+ 'cn20k_cryptodev_ops.c',
'cnxk_cryptodev.c',
'cnxk_cryptodev_capabilities.c',
'cnxk_cryptodev_devargs.c',
--
2.25.1
