On 11/7/2025 3:24 AM, Stephen Hemminger wrote: > On Thu, 6 Nov 2025 20:49:59 +0800 > Chengwen Feng <[email protected]> wrote: > >> +static void >> +dcb_forward_tc_update_dcb_info(struct rte_eth_dcb_info *org_dcb_info) >> +{ >> + struct rte_eth_dcb_info dcb_info = {0}; >> + uint32_t i, vmdq_idx; >> + uint32_t tc = 0; >> + >> + if (dcb_fwd_tc_mask == DEFAULT_DCB_FWD_TC_MASK) >> + return; >> + >> + /* >> + * Use compress scheme to update dcb-info. >> + * E.g. If org_dcb_info->nb_tcs is 4 and dcb_fwd_tc_mask is 0x8, it >> + * means only enable TC3, then the new dcb-info's nb_tcs is set to >> + * 1, and also move corresponding tc_rxq and tc_txq info to new >> + * index. >> + */ >> + for (i = 0; i < org_dcb_info->nb_tcs; i++) { >> + if (!(dcb_fwd_tc_mask & (1u << i))) >> + continue; >> + for (vmdq_idx = 0; vmdq_idx < RTE_ETH_MAX_VMDQ_POOL; >> vmdq_idx++) { >> + dcb_info.tc_queue.tc_rxq[vmdq_idx][tc].base = >> + org_dcb_info->tc_queue.tc_rxq[vmdq_idx][i].base; >> + dcb_info.tc_queue.tc_rxq[vmdq_idx][tc].nb_queue = >> + >> org_dcb_info->tc_queue.tc_rxq[vmdq_idx][i].nb_queue; >> + dcb_info.tc_queue.tc_txq[vmdq_idx][tc].base = >> + org_dcb_info->tc_queue.tc_txq[vmdq_idx][i].base; >> + dcb_info.tc_queue.tc_txq[vmdq_idx][tc].nb_queue = >> + >> org_dcb_info->tc_queue.tc_txq[vmdq_idx][i].nb_queue; >> + } >> + tc++; >> + } >> + dcb_info.nb_tcs = tc; >> + memcpy(org_dcb_info, &dcb_info, sizeof(struct rte_eth_dcb_info)); > > Prefer direct structure assignment over memcpy() here. > *org_dcb_info = dcb_info; > > This makes sure types are the same, and compiler generates same code.
Thanks Stephen, the V4 already sent to fix it.
