[PATCH v5 20/23] common/cnxk: fix CPT res address config for inline

[Nithin Dabilpuram]

From: Aarnav JP <a...@marvell.com>

Fix CPT res address config logic to avoid garbage values
and trigger only when inline dev is present.

Fixes: 3c31a7485172 ("common/cnxk: config CPT result address for CN20K")
Signed-off-by: Aarnav JP <a...@marvell.com>
---
 drivers/common/cnxk/roc_nix_inl.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_inl.c 
b/drivers/common/cnxk/roc_nix_inl.c
index 6700f556a0..780f4cbbfc 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -581,7 +581,7 @@ nix_inl_reass_inb_sa_tbl_setup(struct roc_nix *roc_nix)
        struct nix_inl_dev *inl_dev = NULL;
        uint64_t max_sa = 1, sa_pow2_sz;
        uint64_t sa_idx_w, lenm1_max;
-       uint64_t res_addr_offset;
+       uint64_t res_addr_offset = 0;
        uint64_t def_cptq = 0;
        size_t inb_sa_sz = 1;
        uint8_t profile_id;
@@ -626,12 +626,11 @@ nix_inl_reass_inb_sa_tbl_setup(struct roc_nix *roc_nix)
                inl_dev = idev->nix_inl_dev;
                if (inl_dev->nb_inb_cptlfs)
                        def_cptq = 
inl_dev->nix_inb_qids[inl_dev->inb_cpt_lf_id];
+               res_addr_offset = (uint64_t)(inl_dev->res_addr_offset & 0xFF) 
<< 48;
+               if (res_addr_offset)
+                       res_addr_offset |= (1UL << 56);
        }
 
-       res_addr_offset = (uint64_t)(inl_dev->res_addr_offset & 0xFF) << 48;
-       if (res_addr_offset)
-               res_addr_offset |= (1UL << 56);
-
        lf_cfg->enable = 1;
        lf_cfg->profile_id = profile_id;
        lf_cfg->rx_inline_sa_base = (uintptr_t)nix->inb_sa_base[profile_id];
-- 
2.34.1