After obtaining the DTB element register, check if the PCIe link is abnormal.
Signed-off-by: Tianhao Zhang <[email protected]> --- drivers/net/zxdh/zxdh_np.c | 8 +++++++- drivers/net/zxdh/zxdh_np.h | 3 +++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/zxdh/zxdh_np.c b/drivers/net/zxdh/zxdh_np.c index 024da113e2..89c9283498 100644 --- a/drivers/net/zxdh/zxdh_np.c +++ b/drivers/net/zxdh/zxdh_np.c @@ -3698,6 +3698,12 @@ zxdh_np_dtb_queue_unused_item_num_get(uint32_t dev_id, rc = zxdh_np_reg_read(dev_id, ZXDH_DTB_INFO_QUEUE_BUF_SPACE, 0, queue_id, p_item_num); ZXDH_COMM_CHECK_DEV_RC(dev_id, rc, "dpp_reg_read"); + + if ((*p_item_num & ZXDH_DTB_SPACE_LEFT_MASK) == ZXDH_DTB_SPACE_LEFT_MASK) { + PMD_DRV_LOG(ERR, "pcie bar abnormal."); + return ZXDH_RC_DTB_BAR_ABNORMAL; + } + return rc; } @@ -5374,7 +5380,7 @@ zxdh_np_dtb_tab_down_success_status_check(uint32_t dev_id, element_id, 0, ZXDH_DTB_TAB_ACK_UNUSED_MASK); ZXDH_COMM_CHECK_DEV_RC(dev_id, rc, "zxdh_np_dtb_item_ack_wr"); - return ZXDH_ERR; + return ZXDH_RC_DTB_OVER_TIME; } rd_cnt++; diff --git a/drivers/net/zxdh/zxdh_np.h b/drivers/net/zxdh/zxdh_np.h index b0823192e7..80eac8de37 100644 --- a/drivers/net/zxdh/zxdh_np.h +++ b/drivers/net/zxdh/zxdh_np.h @@ -94,6 +94,7 @@ #define ZXDH_DTB_TAB_ACK_SUCCESS_MASK (0xff) #define ZXDH_DTB_TAB_ACK_FAILED_MASK (0x1) #define ZXDH_DTB_TAB_ACK_CHECK_VALUE (0x12345678) +#define ZXDH_DTB_SPACE_LEFT_MASK (0x3F) #define ZXDH_DTB_TAB_ACK_VLD_SHIFT (104) #define ZXDH_DTB_TAB_ACK_STATUS_SHIFT (96) @@ -321,6 +322,8 @@ #define ZXDH_RC_DTB_DUMP_SIZE_SMALL (ZXDH_RC_DTB_BASE | 0x16) #define ZXDH_RC_DTB_SEARCH_VPORT_QUEUE_ZERO (ZXDH_RC_DTB_BASE | 0x17) #define ZXDH_RC_DTB_QUEUE_NOT_ENABLE (ZXDH_RC_DTB_BASE | 0x18) +#define ZXDH_RC_DTB_OVER_TIME (ZXDH_RC_DTB_BASE | 0x19) +#define ZXDH_RC_DTB_BAR_ABNORMAL (ZXDH_RC_DTB_BASE | 0x1a) #define ZXDH_RC_CTRLCH_BASE (0xf00) #define ZXDH_RC_CTRLCH_MSG_LEN_ZERO (ZXDH_RC_CTRLCH_BASE | 0x0) -- 2.27.0
