On Sat, 31 Jan 2026 14:22:03 +0800 Junlong Wang <[email protected]> wrote:
> V3: > - modify some issues from AI review. > > V2: > - add updated release note and the documentation. > - remove unnecessary initialization. > - using the compiler builtins(__rte_clz32). > - remove C++ style comments. > > V1: > - support modifying queue depth. > - optimeze alloc queue resources. > - support set link speed. > - support primary/secondary process. > - support GENEVE TSO/chksum,and tunnel packets outer udp chksum. > > Junlong Wang (5): > net/zxdh: add support for modifying queue depth > net/zxdh: optimize alloc queue resources > net/zxdh: add link speed set and autoneg get support > net/zxdh: add support for primary/secondary process > net/zxdh: add support for GENEVE TSO and Rx outer checksum > > doc/guides/rel_notes/release_26_03.rst | 7 + > drivers/net/zxdh/zxdh_common.c | 75 ++------ > drivers/net/zxdh/zxdh_common.h | 2 +- > drivers/net/zxdh/zxdh_ethdev.c | 239 +++++++++++++++++-------- > drivers/net/zxdh/zxdh_ethdev.h | 23 ++- > drivers/net/zxdh/zxdh_ethdev_ops.c | 165 ++++++++++++++--- > drivers/net/zxdh/zxdh_ethdev_ops.h | 15 ++ > drivers/net/zxdh/zxdh_msg.c | 52 ++++++ > drivers/net/zxdh/zxdh_msg.h | 24 ++- > drivers/net/zxdh/zxdh_pci.h | 2 + > drivers/net/zxdh/zxdh_queue.c | 137 +++++++++++--- > drivers/net/zxdh/zxdh_queue.h | 12 +- > drivers/net/zxdh/zxdh_rxtx.c | 117 +++++++++--- > drivers/net/zxdh/zxdh_tables.h | 12 +- > 14 files changed, 655 insertions(+), 227 deletions(-) > This looks much better, there a couple of AI review complaints about commit message style. I will address those during the merge. For example, the AI generated commit message for the second patch would be: net/zxdh: optimize queue resource allocation with hardware locking This patch refactors the queue resource allocation mechanism to improve performance and reduce complexity by moving the allocation operation inside the hardware lock critical section. Key changes: - Remove the complex zxdh_common_table_write() function and its associated messaging infrastructure - Simplify zxdh_datach_set() to directly write PCIe ID to hardware registers using BAR0 memory mapping - Move queue resource allocation (zxdh_datach_set) inside the hardware lock critical section in zxdh_get_available_channel() - Remove the separate zxdh_datach_set() call from zxdh_reconfig_queues() since it's now handled during channel allocation - Add new PCIe ID address and size definitions for direct register access This optimization eliminates the overhead of complex message passing for queue setup operations while ensuring atomic allocation of queue resources under hardware lock protection. Signed-off-by: Junlong Wang <[email protected]>
