[PATCH 5/8] net/cnxk: config RQ PB and WQE caching

[Rahul Bhansali]

Config RQ's PB (packet buffer) and WQE caching to default
values.

Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
---
 drivers/net/cnxk/cnxk_eswitch.c | 2 ++
 drivers/net/cnxk/cnxk_ethdev.c  | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/net/cnxk/cnxk_eswitch.c b/drivers/net/cnxk/cnxk_eswitch.c
index 6b1bfdd476..e45c7dfd07 100644
--- a/drivers/net/cnxk/cnxk_eswitch.c
+++ b/drivers/net/cnxk/cnxk_eswitch.c
@@ -389,6 +389,8 @@ cnxk_eswitch_rxq_setup(struct cnxk_eswitch_dev 
*eswitch_dev, uint16_t qid, uint1
        rq->aura_handle = lpb_pool->pool_id;
        rq->flow_tag_width = 32;
        rq->sso_ena = false;
+       rq->pb_caching = ROC_NIX_RQ_DEFAULT_PB_CACHING;
+       rq->wqe_caching = ROC_NIX_RQ_DEFAULT_WQE_CACHING;
 
        /* Calculate first mbuf skip */
        first_skip = (sizeof(struct rte_mbuf));
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index c979454f37..c5daf0ca10 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -959,6 +959,8 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t qid,
        rq->aura_handle = lpb_pool->pool_id;
        rq->flow_tag_width = 32;
        rq->sso_ena = false;
+       rq->pb_caching = ROC_NIX_RQ_DEFAULT_PB_CACHING;
+       rq->wqe_caching = ROC_NIX_RQ_DEFAULT_WQE_CACHING;
 
        /* Calculate first mbuf skip */
        first_skip = (sizeof(struct rte_mbuf));
-- 
2.34.1