On Wed, 29 Apr 2026 18:25:02 +0800
Zaiyu Wang <[email protected]> wrote:
> The flow control counter registers on AML NICs differ from those on SP
> NICs. Update the register offsets accordingly to ensure the counters
> work correctly.
>
> Fixes: fb6eb170dfa2 ("net/txgbe: add basic link configuration for Amber-Lite")
> Cc: [email protected]
>
> Signed-off-by: Zaiyu Wang <[email protected]>
> ---
AI review warning:
Warning: txgbe_ethdev.c, in the AML branch added in
txgbe_read_stats_registers(), uses assignment instead of accumulation:

if (hw->mac.type == txgbe_mac_aml || hw->mac.type == txgbe_mac_aml40) {
hw_stats->rx_xon_packets = rd32(hw, TXGBE_PBRXLNKXON_AML);
hw_stats->rx_xoff_packets = rd32(hw, TXGBE_PBRXLNKXOFF_AML);
} else {
hw_stats->rx_xon_packets += rd32(hw, TXGBE_PBRXLNKXON);
The AML registers are write-clearable (cleared with wr32(reg, 0) in
txgbe_clear_hw_cntrs) rather than read-on-clear. Reads return the absolute
count from the hardware. txgbe_dev_stats_reset() zeros hw_stats but does not
clear the hardware register, so on the next stats_get() the counters will jump
back to the absolute hardware value rather than restarting from zero. The AML
path needs the same offset-tracking pattern that UPDATE_QP_COUNTER_32bit uses
(or the AML registers need to be cleared in stats_reset).
