> -----Original Message----- > From: Stephen Hemminger <[email protected]> > Sent: Wednesday 24 June 2026 18:55 > To: [email protected] > Cc: Stephen Hemminger <[email protected]>; [email protected]; Wathsala > Vithanage > <[email protected]>; Konstantin Ananyev > <[email protected]>; Marat Khalili > <[email protected]>; Jerin Jacob <[email protected]> > Subject: [PATCH v5 4/9] bpf/arm64: mask shift count per RFC 9669 > > The ARM JIT was not masking the shift count as required by RFC 9669 > (0x3f for 64-bit, 0x1f for 32-bit), so large immediate shift counts > overflowed the UBFM/SBFM encoding and failed the JIT. Mask the > immediate in emit_lsl/emit_lsr/emit_asr. > > Fixes: 9f4469d9e83a ("bpf/arm: add logical operations") > Cc: [email protected] > > Signed-off-by: Stephen Hemminger <[email protected]>
Acked-by: Marat Khalili <[email protected]> > --- > lib/bpf/bpf_jit_arm64.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/lib/bpf/bpf_jit_arm64.c b/lib/bpf/bpf_jit_arm64.c > index ba7ae4d680..7582370062 100644 > --- a/lib/bpf/bpf_jit_arm64.c > +++ b/lib/bpf/bpf_jit_arm64.c > @@ -545,12 +545,14 @@ emit_bitfield(struct a64_jit_ctx *ctx, bool is64, > uint8_t rd, uint8_t rn, > emit_insn(ctx, insn, check_reg(rd) || check_reg(rn) || > check_immr_imms(is64, immr, imms)); > } > + > static void > emit_lsl(struct a64_jit_ctx *ctx, bool is64, uint8_t rd, uint8_t imm) > { > const unsigned int width = is64 ? 64 : 32; > uint8_t imms, immr; > > + imm &= width - 1; > immr = (width - imm) & (width - 1); > imms = width - 1 - imm; > > @@ -560,13 +562,19 @@ emit_lsl(struct a64_jit_ctx *ctx, bool is64, uint8_t > rd, uint8_t imm) > static void > emit_lsr(struct a64_jit_ctx *ctx, bool is64, uint8_t rd, uint8_t imm) > { > - emit_bitfield(ctx, is64, rd, rd, imm, is64 ? 63 : 31, A64_UBFM); > + const unsigned int width = is64 ? 64 : 32; > + > + imm &= width - 1; > + emit_bitfield(ctx, is64, rd, rd, imm, width - 1, A64_UBFM); > } > > static void > emit_asr(struct a64_jit_ctx *ctx, bool is64, uint8_t rd, uint8_t imm) > { > - emit_bitfield(ctx, is64, rd, rd, imm, is64 ? 63 : 31, A64_SBFM); > + const unsigned int width = is64 ? 64 : 32; > + > + imm &= width - 1; > + emit_bitfield(ctx, is64, rd, rd, imm, width - 1, A64_SBFM); > } > > #define A64_AND 0 > -- > 2.53.0
