The x86 special case keeps its shape: a release fence is the same compiler barrier the SMP write barrier was, so the measured perf reason for the branch is preserved.
Signed-off-by: Stephen Hemminger <[email protected]> --- drivers/net/virtio/virtqueue.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h index 37fbd47d42..cd954108a8 100644 --- a/drivers/net/virtio/virtqueue.h +++ b/drivers/net/virtio/virtqueue.h @@ -474,14 +474,14 @@ static inline void vq_update_avail_idx(struct virtqueue *vq) { if (vq->hw->weak_barriers) { - /* x86 prefers to using rte_smp_wmb over rte_atomic_store_explicit as - * it reports a slightly better perf, which comes from the - * saved branch by the compiler. - * The if and else branches are identical with the smp and - * io barriers both defined as compiler barriers on x86. + /* x86 prefers a fence plus plain store over + * rte_atomic_store_explicit as it reports a slightly better + * perf, which comes from the saved branch by the compiler. + * The if and else branches are identical with the release + * and io barriers both compiler barriers on x86. */ #ifdef RTE_ARCH_X86_64 - rte_smp_wmb(); + rte_atomic_thread_fence(rte_memory_order_release); vq->vq_split.ring.avail->idx = vq->vq_avail_idx; #else rte_atomic_store_explicit(&vq->vq_split.ring.avail->idx, -- 2.53.0
