Redefine the nicvf barrier wrappers as C11 fences and add an IO variant. The RBDR refill barrier orders descriptor writes in DMA memory against the doorbell register write, which is device ordering: use the IO barrier there.
The mailbox flag barriers are inter thread ordering and become release/acquire fences, matching what the old barriers did. Note the flags they order (pf_acked, pf_nacked) are plain bitfields sharing a byte with other fields, so a fence alone is not sufficient for them under C11; making them atomic is a pre-existing issue left for a separate patch. Signed-off-by: Stephen Hemminger <[email protected]> --- drivers/net/thunderx/base/nicvf_hw.c | 3 ++- drivers/net/thunderx/base/nicvf_plat.h | 5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/thunderx/base/nicvf_hw.c b/drivers/net/thunderx/base/nicvf_hw.c index 5b1abe2015..d1e31ffdaa 100644 --- a/drivers/net/thunderx/base/nicvf_hw.c +++ b/drivers/net/thunderx/base/nicvf_hw.c @@ -499,7 +499,8 @@ nicvf_qset_rbdr_precharge(void *dev, struct nicvf *nic, break; } } - nicvf_smp_wmb(); + /* Descriptors must be visible to the device before the doorbell */ + nicvf_io_wmb(); nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_DOOR, ridx, count); rbdr->tail = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_TAIL, ridx) >> 3; diff --git a/drivers/net/thunderx/base/nicvf_plat.h b/drivers/net/thunderx/base/nicvf_plat.h index 8421f57040..08ebb0cf62 100644 --- a/drivers/net/thunderx/base/nicvf_plat.h +++ b/drivers/net/thunderx/base/nicvf_plat.h @@ -25,8 +25,9 @@ /* barrier */ #include <rte_atomic.h> -#define nicvf_smp_wmb() rte_smp_wmb() -#define nicvf_smp_rmb() rte_smp_rmb() +#define nicvf_smp_wmb() rte_atomic_thread_fence(rte_memory_order_release) +#define nicvf_smp_rmb() rte_atomic_thread_fence(rte_memory_order_acquire) +#define nicvf_io_wmb() rte_io_wmb() /* utils */ #include <rte_common.h> -- 2.53.0
