06/10/2026 17:18, Shreesh Adiga: > This patch includes the following minor changes: > 1) Use TBL based shift left for variable len shift instead of using > vshift_bytes_left which adds a switch case for 16 len cases. > 2) Align the fold constants to use PMULL and PMULL2 instructions > instead of using cross lane operands which requires additional shift. > 3) Remove unnecessary static arrays used in crc32_reduce_64_to_32 by > adapting x86 SSE logic. > 4) Use x86 SSE logic for processing partial bytes sequence to avoid > using multiple variable len shifts which inserts switch case. > > Signed-off-by: Shreesh Adiga <[email protected]>
Applied, thanks.
