From: Stefan Wegrzyn <[email protected]> Add the PQC certificate provisioning device capability, part of CNSA 2.0 and SPDM 1.4 support, and the Shadow RAM location of the PQC manifest bank.
Signed-off-by: Stefan Wegrzyn <[email protected]> Signed-off-by: Vladimir Medvedkin <[email protected]> --- drivers/net/intel/ice/base/ice_adminq_cmd.h | 1 + drivers/net/intel/ice/base/ice_common.c | 5 +++++ drivers/net/intel/ice/base/ice_type.h | 5 ++++- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/intel/ice/base/ice_adminq_cmd.h b/drivers/net/intel/ice/base/ice_adminq_cmd.h index 36656b0aad..7b318b0a1b 100644 --- a/drivers/net/intel/ice/base/ice_adminq_cmd.h +++ b/drivers/net/intel/ice/base/ice_adminq_cmd.h @@ -130,6 +130,7 @@ struct ice_aqc_list_caps_elem { #define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE 0x0085 #define ICE_AQC_CAPS_NAC_TOPOLOGY 0x0087 #define ICE_AQC_CAPS_OROM_RECOVERY_UPDATE 0x0090 +#define ICE_AQC_CAPS_PQC_CERT_PROVISIONING 0x0091 #define ICE_AQC_CAPS_ROCEV2_LAG 0x0092 #define ICE_AQC_BIT_ROCEV2_LAG 0x01 #define ICE_AQC_BIT_SRIOV_LAG 0x02 diff --git a/drivers/net/intel/ice/base/ice_common.c b/drivers/net/intel/ice/base/ice_common.c index 7d8f677c99..1a8f4e7a6e 100644 --- a/drivers/net/intel/ice/base/ice_common.c +++ b/drivers/net/intel/ice/base/ice_common.c @@ -2635,6 +2635,11 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, ice_debug(hw, ICE_DBG_INIT, "%s: orom_recovery_update = %d\n", prefix, caps->orom_recovery_update); break; + case ICE_AQC_CAPS_PQC_CERT_PROVISIONING: + caps->pqc_cert_provisioning = (number == 1); + ice_debug(hw, ICE_DBG_INIT, "%s: pqc_cert_provisioning = %d\n", + prefix, caps->pqc_cert_provisioning); + break; case ICE_AQC_CAPS_NEXT_CLUSTER_ID: caps->next_cluster_id_support = (number == 1); ice_debug(hw, ICE_DBG_INIT, "%s: next_cluster_id_support = %d\n", diff --git a/drivers/net/intel/ice/base/ice_type.h b/drivers/net/intel/ice/base/ice_type.h index 6d8c187689..83d20358b9 100644 --- a/drivers/net/intel/ice/base/ice_type.h +++ b/drivers/net/intel/ice/base/ice_type.h @@ -756,6 +756,7 @@ struct ice_hw_common_caps { bool tx_sched_topo_comp_mode_en; /* Support for OROM update in Recovery Mode */ bool orom_recovery_update; + bool pqc_cert_provisioning; bool next_cluster_id_support; }; @@ -1628,8 +1629,10 @@ struct ice_aq_get_set_rss_lut_params { #define ICE_SR_EMP_SR_SETTINGS_PTR 0x48 #define ICE_SR_CONFIGURATION_METADATA_PTR 0x4D #define ICE_SR_IMMEDIATE_VALUES_PTR 0x4E -#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134 +#define ICE_SR_PQC_MANIFEST_BANK_PTR 0x80 +#define ICE_SR_PQC_MANIFEST_BANK_SIZE 0x81 #define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR 0x118 +#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134 /* CSS Header words */ #define ICE_NVM_CSS_HDR_LEN_L 0x02 -- 2.43.0
