This patch add changes to align with ZUC 256 V2 authentication microcode support.
Signed-off-by: Nithinsen Kaithakadan <[email protected]> --- drivers/common/cnxk/roc_se.c | 5 +++++ drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 5 ++++- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 2 +- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_se.c b/drivers/common/cnxk/roc_se.c index 1cec536169..ce0e7fe84a 100644 --- a/drivers/common/cnxk/roc_se.c +++ b/drivers/common/cnxk/roc_se.c @@ -255,6 +255,11 @@ cpt_pdcp_chain_key_type_get(uint16_t key_len) static void cpt_zuc_const_update(uint8_t *zuc_const, int key_len, int mac_len) { + if (key_len == 32 && roc_model_is_cn20k()) { + memcpy(zuc_const, zuc_key256_v2, 16); + return; + } + if (key_len == 16) { memcpy(zuc_const, zuc_key128, 32); } else if (key_len == 32) { diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c index 577f080ba7..b941567015 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c @@ -2091,7 +2091,10 @@ cn10k_20k_crypto_caps_update(struct rte_cryptodev_capabilities cnxk_caps[]) caps->sym.auth.key_size.increment = 16; caps->sym.auth.digest_size.max = 16; caps->sym.auth.digest_size.increment = 4; - caps->sym.auth.iv_size.max = 25; + if (roc_model_is_cn20k()) + caps->sym.auth.iv_size.max = 16; + else + caps->sym.auth.iv_size.max = 25; caps->sym.auth.iv_size.increment = 1; } } diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index a5b8aff146..14a4b0fff9 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -672,8 +672,8 @@ cnxk_sess_fill(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xform, bool ciph_then_auth = false; if (roc_model_is_cn20k()) { - sess->roc_se_ctx->pdcp_iv_len = 40; sess->roc_se_ctx->pdcp_iv_offset = 16; + sess->roc_se_ctx->pdcp_iv_len = 32; } else if (roc_cpt->hw_caps[CPT_ENG_TYPE_SE].pdcp_chain_zuc256) { sess->roc_se_ctx->pdcp_iv_offset = 24; sess->roc_se_ctx->pdcp_iv_len = 48; -- 2.34.1
