Two fixes for E830 from the Media Transport Library (MTL), which uses Tx time based pacing (TxPP) for SMPTE ST 2110 video.
Patch 1 fixes the encoding of the launch time. The driver takes the launch time modulo one second, but the 19-bit field of the descriptor wraps every 67.1 ms of PHC time. Thus at each second boundary, the launch time that the hardware sees moves 6.63 ms, and in half of each 10.1 s cycle the packets look late. The Linux ice driver uses the same encoding (ts.tv_nsec >> 7). We did not test the kernel path. MTL carries patch 1 on DPDK 26.07. With one ST 2110-20 stream on a 1024-entry Tx ring, 6 of 13 runs lost pacing without it, and 32 of 32 runs paced correctly with it. We do not have a testpmd reproduction yet: on our E830 test port, testpmd txonly with "set txtimes" sends no packet, with or without the patch. We investigate that separately. Patch 2 fixes rte_eth_timesync_adjust_time() on E830. Since commit f9767f70cb73, each adjustment sends a PHY timer command to firmware on the admin queue, and the firmware rejects it with -100. The E830 PHY follows the source timer, so the patch removes that command. On an E830-CC PF (firmware 1.3833.0), "step" is the change of PHC minus CLOCK_REALTIME across the call, about -245 ns for a delta of 0: delta (ns) without patch 2 with patch 2 0 -1, "err -100" 0, step -238 to -249 ns +1000 - 0, step +691 to +890 ns (3 runs) -1000 - 0, step -1128 to -1250 ns (3 runs) +1000000 -1, step -1279 ns 0, step +999762 ns -1000000 -1, step -171 ns 0, step -1000247 ns Two more TxPP fixes are needed for a correct pacing on E830, and Soumyadeep Hore sends them separately: the Tx time queue context does not set timer_num, and rte_eth_read_clock() returns the system time instead of the PHC time. Dawid Wesierski (2): net/ice: fix TxPP launch time encoding net/ice/base: fix E830 PHY timer command drivers/net/intel/ice/base/ice_ptp_hw.c | 22 ++-------------------- drivers/net/intel/ice/base/ice_ptp_hw.h | 2 -- drivers/net/intel/ice/ice_rxtx.c | 3 ++- 3 files changed, 4 insertions(+), 23 deletions(-) base-commit: cc048a01ec4c7ae5f63a6607260ac05cc1588968 -- 2.43.0 --------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
