From: Shweta Choudaha <shweta.choud...@att.com>
Add ixgbe MDIO access APIs to read and write PHY registers
when being used as a backplane port. Export these APIs via the map file
Signed-off-by: Shweta Choudaha <shweta.choud...@att.com>
Reviewed-by: Chas Williams <ch...@att.com>
Reviewed-by: Luca Boccassi <bl...@debian.org>
---
drivers/net/ixgbe/rte_pmd_ixgbe.c | 53 +++++++++++++++++++++++++++++
drivers/net/ixgbe/rte_pmd_ixgbe.h | 39 +++++++++++++++++++++
drivers/net/ixgbe/rte_pmd_ixgbe_version.map | 2 ++
3 files changed, 94 insertions(+)
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c
b/drivers/net/ixgbe/rte_pmd_ixgbe.c
index 001a8647e..a3f376e11 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.c
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c
@@ -1012,3 +1012,56 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id)
return ixgbe_bypass_wd_reset(dev);
}
#endif
+
+static void rte_pmd_ixgbe_get_hw_phy(uint16_t port, struct ixgbe_hw **hw,
+ struct ixgbe_phy_info **phy)
+{
+ struct rte_eth_dev *dev;
+
+ *hw = NULL;
+ *phy = NULL;
+
+ dev = &rte_eth_devices[port];
+ if (!is_ixgbe_supported(dev))
+ return;
+
+ *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ if (!*hw)
+ return;
+
+ *phy = &(*hw)->phy;
+}
+
+int
+rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr,
+ uint32_t dev_type, uint16_t *phy_data)
+{
+ struct ixgbe_hw *hw;
+ struct ixgbe_phy_info *phy;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ rte_pmd_ixgbe_get_hw_phy(port, &hw, &phy);
+
+ if (!hw || !phy)
+ return -ENOTSUP;
+
+ return phy->ops.read_reg(hw, reg_addr, dev_type, phy_data);
+}
+
+int
+rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr,
+ uint32_t dev_type, uint16_t phy_data)
+{
+ struct ixgbe_hw *hw;
+ struct ixgbe_phy_info *phy;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ rte_pmd_ixgbe_get_hw_phy(port, &hw, &phy);
+
+ if (!hw || !phy)
+ return -ENOTSUP;
+
+ return phy->ops.write_reg(hw, reg_addr, dev_type, phy_data);
+}
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h
b/drivers/net/ixgbe/rte_pmd_ixgbe.h
index 463a78e50..1fd6280e5 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe.h
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h
@@ -573,6 +573,45 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port,
uint32_t *wd_timeout);
*/
int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port);
+/**
+ * Read PHY register using MDIO with swfw semaphore lock
+ *
+ * @param port
+ * The port identifier of the Ethernet device.
+ * @param reg_addr
+ * 32 bit PHY Register
+ * @param dev_type
+ * Always Unused
+ * @param phy_data
+ * Pointer for reading PHY register data
+ * @return
+ * - (0) if successful.
+ * - (-ENOTSUP) if hardware doesn't support.
+ * - (-ENODEV) if *port* invalid.
+ */
+int
+rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr,
+ uint32_t dev_type, uint16_t *phy_data);
+
+/**
+ * Write data to PHY register using MDIO with swfw semaphore lock
+ *
+ * @param port
+ * The port identifier of the Ethernet device.
+ * @param reg_addr
+ * 32 bit PHY Register
+ * @param dev_type
+ * Always unused
+ * @param phy_data
+ * Data to write to PHY register
+ * @return
+ * - (0) if successful.
+ * - (-ENOTSUP) if hardware doesn't support.
+ * - (-ENODEV) if *port* invalid.
+ */
+int
+rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr,
+ uint32_t dev_type, uint16_t phy_data);
/**
* Response sent back to ixgbe driver from user app after callback
diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
index bf776742c..9cad217e9 100644
--- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
+++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map
@@ -51,4 +51,6 @@ DPDK_17.08 {
rte_pmd_ixgbe_bypass_wd_reset;
rte_pmd_ixgbe_bypass_wd_timeout_show;
rte_pmd_ixgbe_bypass_wd_timeout_store;
+ rte_pmd_ixgbe_mdio_read;
+ rte_pmd_ixgbe_mdio_write;
} DPDK_17.05;
--
2.11.0
