The reason I ask is because I am working on threading memory leaks that assume GCV5.
How come? Shouldn't DRLVM's TM be GC independent? -- Pavel Pervov, Intel Enterprise Solutions Software Division
The reason I ask is because I am working on threading memory leaks that assume GCV5.
How come? Shouldn't DRLVM's TM be GC independent? -- Pavel Pervov, Intel Enterprise Solutions Software Division