Um .... Can we try irq affinity of timer(IRQ0) In this state? For example, #> cat 2 > /proc/irq/0/smp_affinity [enter]
On Fri, May 22, 2009 at 11:06 PM, Arjan van de Ven <[email protected]>wrote: > >> # cat /proc/interrupts >> CPU0 CPU1 >> 0: 67465990 0 IO-APIC-edge timer >> 27: 286615 291 PCI-MSI-edge eth0 >> >> Here Interrupt count of eth0 only on cpu1 is increasing. >> It is supposed to be balance now. Am I correct? Pls confirm me,whether >> this >> understanding is correct? >> > > Your assumption is not correct. Putting a "3" there just means that the > hardware is allowed to put the irq on either logical cpu, it does not > mean that it will perfectly round robin. > > _______________________________________________ > Moblin dev Mailing List > [email protected] > > To manage or unsubscribe from this mailing list visit: > https://lists.moblin.org/mailman/listinfo/dev or your user account on > http://moblin.org once logged in. > > For more information on the Moblin Developer Mailing lists visit: > http://moblin.org/community/mailing-lists > _______________________________________________ Moblin dev Mailing List [email protected] To manage or unsubscribe from this mailing list visit: https://lists.moblin.org/mailman/listinfo/dev or your user account on http://moblin.org once logged in. For more information on the Moblin Developer Mailing lists visit: http://moblin.org/community/mailing-lists
