Hi Krsten! Yes, having a RISC-V support would be great! I’d be more than happy to support any effort to make this a reality.
> On Jul 21, 2016, at 11:00 PM, Krste Asanovic <[email protected]> wrote: > > > Hi, > > I learned about Mynewt from James Pace's recent talk at the 4th RISC-V > workshop. It seems like a great technical and cultural fit for the > RISC-V ecosystem, which is filling out rapidly. I'm writing this > email to inform the community about RISC-V, with the hope of > attracting Mynewt developers to RISC-V platforms. > > RISC-V is a free and open instruction set architecture developed by my > group at UC Berkeley, which now is supported by the RISC-V Foundation > with now over 40 members from many of the largest semiconductor and > systems companies. As one example of the uptake, at this last > workshop, Nvidia presented details of their embedded core evaluation > and their decision to use RISC-V cores for the embedded controllers in > their future products. Check out riscv.org for details. > > SiFive (sifive.com) is our new startup trying to provide the missing > link between open-source hardware and production silicon. Based on > the permissively licensed open-source RISC-V processor designs from UC > Berkeley, SiFive will be continuing to support open-source RTL of the > processor and platform. At SiFive, we've made available our Freedom > Everywhere development system as a bitstring that can be downloaded to > inexpensive FPGA development boards (dev.sifive.com). A full set of > open-source development and debug tools are also available. We're > keen to support a port of the Mynewt stack to RISC-V to our Freedom > Everywhere platform, and the SiFive engineering team can support these > efforts through the developer forum. > > We believe there could be many real-world applications for Mynewt on > RISC-V, and the combination could represent a truly open alternative > to other IoT stacks. > > Krste
