On 6/21/2020 12:54 PM, Brennan Ashton wrote:
On Sun, Jun 21, 2020, 11:46 AM Gregory Nutt <spudan...@gmail.com> wrote:
I'm bringing up support for a new RISC-V core but I'm running into some
issues around the sys tick.
My tick timer interrupt is disabled at activating a task, clearly this is
not correct. This is code used across all architectures so I'm sure I
just
do not understand something
void nxtask_activate(FAR struct tcb_s *tcb)
{
irqstate_t flags = enter_critical_section();
up_unblock_task(tcb);
leave_critical_section(flags);
}
Won't we perform a context switch here and not leave the critical
section?
No, the critical section is left automatically when the context switch
occurs. The critical section is not a global attribute; it is a per
task attribute. If Task A enters the critical section then suspends (as
above) the state of critical section is saved and the new state of the
critical section for the newly started Task B is instantiated. For a
new task like this, the initial state of the critical section will be
"not-in-a-critical section".
This is described in a Wiki pages somewhere, but I don't recall which.
In know that is mentioned in the Wiki page on the critical section
monitor but I don't think that is the authoritative reference.
So, don't worry. This has all been carefully thought through and has
worked well for 13.3 years.
I totally agree that the os is working as expected and that I am porting
some functionally wrong, but I am trying to understand where the interrupts
get re-enabled in this flow. The irq save/restore look like this, but when
I instrument them I see a save called on the entry to the init task, but
never a restore. At that point the timer isr is never triggered to indicate
an OS tick. Is there another place I should be hooking to renenable the
interrupt on the context switch?
The interrupts interrupts should be restore when the new context is
instantiated in up_unblock_task(). There is no call to irq_restore().
I don't use RISC-V, but I can show you for ARMv7-M:
arch/arm/src/armv7-m/arm_unblocktask.c
103 /* Then switch contexts */
104
105 arm_restorestate(rtcb->xcp.regs);
The state of the interrupts is just part of the state of the task that
is saved and restore on context switches.
Greg
