Thank you very much, this patch is effective for me. Now it is possible to run the ADC example multiple times to read the analog value
> 2020年8月6日 下午8:28，raiden00pl <raiden0...@gmail.com> 写道： > > Hi, > there seems to be a bug in the ADC setup logic and adc_reset() is only > called when the ADC driver is first opened. > You can fix it with the patch below, but I need to verify if it doesn't > break the ADC for STM32F3. If it works, I prepare a PR > > diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c >> index b9f615fc7d..4dffd6637b 100644 >> --- a/arch/arm/src/stm32/stm32_adc.c >> +++ b/arch/arm/src/stm32/stm32_adc.c >> @@ -2886,8 +2886,6 @@ static int adc_setup(FAR struct adc_dev_s *dev) >> return OK; >> } >> >> - priv->initialized += 1; >> - >> /* Attach the ADC interrupt */ >> >> #ifndef CONFIG_STM32_ADC_NOIRQ >> @@ -2960,6 +2958,10 @@ static int adc_setup(FAR struct adc_dev_s *dev) >> adccmn_lock(priv, false); >> #endif >> >> + /* The ADC device is ready */ >> + >> + priv->initialized += 1; >> + >> return ret; >> } >> > > czw., 6 sie 2020 o 13:32 Alan Carvalho de Assis <acas...@gmail.com> > napisał(a): > >> Hi Nii, >> >> What board are you using? It appears like an incorrect ADC board >> configuration. >> >> The analog value for channels 4 and 5 are changing a little bit from >> each sampling, but they appear to make sense. >> >> Try to isolate the issue, you can start with a single channel, start >> without DMA, etc. >> >> Also enabling the DEBUG ADC could give you some hints. >> >> BR, >> >> Alan >> >> On 8/6/20, Nii Jyeni <niijy...@hotmail.com> wrote: >>> I found a strange problem when using the latest source code to test the >> ADC >>> example. The analog value can be obtained when the ADC example is run for >>> the first time. When the ADC example is run again, it is blocked and it >>> looks like it is dead. But send Ctrl+C to the console can terminate it. >>> >>> OS:MacOS >>> Nuttx:nightly >>> MCU:stm32f429iit6 >>> Board:customize >>> >>> NuttShell (NSH) NuttX-9.1.0 >>> nsh> adc -n 2 >>> adc_main: g_adcstate.count: 2 >>> adc_main: Hardware initialized. Opening the ADC device: /dev/adc0 >>> Sample: >>> 1: channel: 4 value: 3091 >>> 2: channel: 5 value: 3782 >>> Sample: >>> 1: channel: 4 value: 3192 >>> 2: channel: 5 value: 3612 >>> nsh> adc -n 2 >>> adc_main: g_adcstate.count: 2 >>> adc_main: Hardware initialized. Opening the ADC device: /dev/adc0 <— >>> terminated by send ctrl + c >>> nsh> adc -n 2 >>> adc_main: g_adcstate.count: 2 >>> adc_main: Hardware initialized. Opening the ADC device: /dev/adc0 <— >>> terminated by send ctrl + c >>> nsh> >>> >>> This is the configuration information about ADC that I am using: >>> CONFIG_STM32_ADC1=y >>> CONFIG_STM32_ADC1_DMA=y >>> CONFIG_STM32_TIM1=y >>> CONFIG_STM32_TIM1_ADC=y >>> CONFIG_EXAMPLES_ADC=y >>> CONFIG_EXAMPLES_ADC_GROUPSIZE=3 >>> CONFIG_ADC=y >>> >>> Does anyone know what is going on? and how to solve this problem. >>
