> Hi all,
>
> I am thinking of using the STM32H747XI for a project I'm working on. This
> particular chip has a CortexM7 and a Cortex M4.  The chips access the same
> memory map and can access and even share the same peripherals.
>
> Part of the problem, however, is that NuttX resets many
> registers/peripherals on boot. This is fine for when the M7 boots, but when > the M4 boots, resetting the RCC registers will ruin all the initialization
> work the M7 has already done.  Temporarily, I added a config variable to
> disable the clock reset on boot, but that's not the only place I'll need to
> disable logic.
>
> So I have 2 questions:
>
>    1. Does anyone have any suggestions or comments for how to disable some
>    of the standard bring-up logic such as rcc_reset() or other peripheral
>    resets? I can add CONFIG options, but I'm afraid of how many options willl
>    wind up needing to be added and it feels a little hacky.

You will need your own custom __start() logic and probably also up_initialize() and board initialization logic.

>    2. Organizationally, how to handle the 2 cores? Currently, I've added an >    option to the STM32H747I-Disco board that allows you to specify which core
>    you are using. Really all that does is switch which flash bank you are
>    targeting by switching the linker script. The M4 and M7 can share
>    instructions as long as double FPU is disabled for the M4. Does a switch at
>    the board level make sense? Or should this switch be at the arch level
>    since it's technically the processor that's got the 2 cores?

I thought that the M4 was a different ISA?  From what you say, I must be mistaken.

So I would have thought it was two separate NuttX builds, with a directory structure similar to nuttx/arch/arm/src/s32k1xx.  There you can see that there is a s32k11x subdirectory (Cortex M0) and a s32k14x subdirectory (cortex M4).  These are separate chips s32k1xx but the directory organization would support dual builds for an heterogeneous architecture.

If you intend to share code with a single build, I am not sure off the top of my head the best way to do that.  Certainly the start-up code can't be shared.  There are lots of other differences the M0 too:  interrupt controller, no BASEPRI register, etc.  So that Cortex-M cannot be shared either.

OpenAMP is also available (see nuttx/openamp).

> Thanks!
>
> -Anthony

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