On Sun, Feb 21, 2021 at 5:08 PM Robert Middleton <osfan6...@gmail.com> wrote:
>
> > I don't have an actual Microchip Explorer16/32 which it sounds like
> > you are working on, but if you were to put a draft PR up or point me
> > at a branch I would be happy to try to run this against the simulator
> > and see if we can get a little further.
> >
> > This is the simulator I was using https://github.com/sergev/qemu/wiki
> > I did have to make a few changes to get it to build with  a modern
> > gcc/glibc
> >
>
> This may be a typo on your side, but I'm testing with an MX, not an
> MZ.  I did just try it with that simulator, and I get an error about
> writing to peripheral register 1f800600 being not supported.

That is TIMER1  I just wrote a patch for that.  I'll try and get that
in a little better place.

>
> Here's the branch that I'm working off of at the moment.  It also has
> a fix for defining CONFIG_SERIAL_TERMIOS with the PIC32, which doesn't
> properly compile:
> https://github.com/rm5248/incubator-nuttx/tree/pic-messing-around
>
> You should be able to get the proper configuration by doing
> ./tools/configure.sh -E -l pic32mx-explorer16:nsh.  Note that the
> explorer16 has the output on UART2 - I don't remember if you can
> switch which UART qemu is using to see that output.  Switching it to
> UART1 for the simulator should be fine though.

Ok running this in the sim I was getting the init thread failing to be
crated, so I enabled debug asserts and get this:
❯ ./mipsel-softmmu/qemu-system-mipsel   -machine pic32mx7-explorer16
-nographic -monitor none   -serial stdio   -kernel
~/nuttx/wrk/nuttx/nuttx.hex -S -s
Board: Microchip Explorer16
Processor: M4K
RAM size: 128 kbytes
Load file: '/home/bashton/nuttx/wrk/nuttx/nuttx.hex', 250820 bytes
nx_start: Entry
up_assert: Assertion failed at file:mm_heap/mm_initialize.c line: 82
up_dumpstate: sp:         a0001b14
up_dumpstate: stack base: a0001c0c
up_dumpstate: stack size: 00001000
up_stackdump: a0001b00: 9d03ad90 a0001b24 9d03a9bc a0001b00 a0001b00
a0001b1c 9d00cecc a0001b14
up_stackdump: a0001b20: a0001c0c 9d03adf0 00001000 a00003fc a0001b14
a0001c0c 00001000 a0001b44
up_stackdump: a0001b40: 9d00b990 00000000 9d03a9bc 9d03a9e8 9d03a104
00000052 00000000 a0001b64
up_stackdump: a0001b60: 9d006260 9d03a104 00000052 a0008061 9d0326cc
a0001b7c 9d008d1c 9d03a104
up_stackdump: a0001b80: 00000052 bf8860c0 a0001b8c a00009a4 00000000
00000001 9d008700 a0001ba4
up_stackdump: a0001ba0: 9d008f78 a00009a4 a0001c0c 0001e3f4 bf8860c0
0000000c a0001bbc a0001bc4
up_stackdump: a0001bc0: 9d008bb4 a00009a4 a0001c0c 0001e3f4 00000003
a0001bdc 9d000380 a0001c0c
up_stackdump: a0001be0: 0001e3f4 ffffffff 00000008 00000010 00000000
00000000 a000038c a0001c0c
up_stackdump: a0001c00: 0001e3f4 00000000 9d000020 00000000 00000000
00000000 00000000 00000000

Dropping the breakpoint on _assert we can then see exactly what is
going on here:

Breakpoint 1, _assert (filename=0x9d03a104 "mm_heap/mm_initialize.c",
linenum=82) at assert/lib_assert.c:36
36      up_assert(filename, linenum);
(gdb) bt
#0  _assert (filename=0x9d03a104 "mm_heap/mm_initialize.c",
linenum=82) at assert/lib_assert.c:36
#1  0x9d008d1c in mm_addregion (heap=0xa00009a4 <g_mmheap>,
heapstart=0xa0001c0c, heapsize=123892) at mm_heap/mm_initialize.c:82
#2  0x9d008f78 in mm_initialize (heap=0xa00009a4 <g_mmheap>,
heapstart=0xa0001c0c, heapsize=123892) at mm_heap/mm_initialize.c:203
#3  0x9d008bb4 in umm_initialize (heap_start=0xa0001c0c,
heap_size=123892) at umm_heap/umm_initialize.c:85
#4  0x9d000380 in nx_start () at init/nx_start.c:552
#5  0x9d000020 in __start_nuttx () at chip/pic32mx_head.S:582
Backtrace stopped: frame did not save the PC
(gdb) up
#1  0x9d008d1c in mm_addregion (heap=0xa00009a4 <g_mmheap>,
heapstart=0xa0001c0c, heapsize=123892) at mm_heap/mm_initialize.c:82
82      DEBUGASSERT(heapsize <= MMSIZE_MAX + 1);
(gdb) p heapsize
$1 = 123892
(gdb)

Then looking at the definition of MMSIZE_MAX we see
"include/nuttx/mm/mm.h" 509L

#ifdef CONFIG_MM_SMALL
typedef uint16_t mmsize_t;
#  define MMSIZE_MAX UINT16_MAX
#else
typedef uint32_t mmsize_t;
#  define MMSIZE_MAX UINT32_MAX
#endif

Your configuration is using CONFIG_MM_SMALL so heap could not be
allocated correctly and we would likely get all kinds of unexpected
behavior.

Resolving that then takes us to another assert failure:

#5  0x9d00cea8 in up_irqinitialize () at chip/pic32mx_irq.c:116
116      up_prioritize_irq(PIC32MX_IRQSRC_CS0, (CHIP_SW0_PRIORITY << 2));
(gdb) down
#4  0x9d00d4ec in up_prioritize_irq (irq=129, priority=24) at
chip/pic32mx_irq.c:476
476      DEBUGASSERT((unsigned)irq < NR_IRQS && (unsigned)(priority >> 2) > 0);

This now starts to explain why the context switch is not happening and
up_swint0 is not triggered
up_prioritize_irq should be called with the real interrupt number not
the offset used when enabling and disabling interrupts:

===include/pic32mx/irq_5xx6xx7xx.h====

#define PIC32MX_IRQ_U5          51 /* Vector: 51, UART5 */
#define PIC32MX_IRQ_BAD         52 /* Not a real IRQ number */
#define NR_IRQS                 52

/* Interrupt numbers.  These should be used for enabling and disabling
 * interrupt sources.  Note that there are more interrupt sources than
 * interrupt vectors and interrupt priorities.  An offset of 128 is
 * used so that there is no overlap with the IRQ numbers and to avoid
 * errors due to misuse.
 */

#define PIC32MX_IRQSRC0_FIRST   (128+0)
#define PIC32MX_IRQSRC_CT       (128+0)  /* Vector: 0, Core Timer Interrupt */


So this change should resolve that:

commit e4439d51d07fbc1357deb06dea6913ee0e3a92ab (HEAD -> pic-messing-around)
Author: Brennan Ashton <bash...@brennanashton.com>
Date:   Sun Feb 21 19:54:58 2021 -0800

    Fix context switch bug for pic32mx

diff --git a/arch/mips/src/pic32mx/pic32mx_irq.c
b/arch/mips/src/pic32mx/pic32mx_irq.c
index a8df13ee79..6ac35e3aa5 100644
--- a/arch/mips/src/pic32mx/pic32mx_irq.c
+++ b/arch/mips/src/pic32mx/pic32mx_irq.c
@@ -113,7 +113,7 @@ void up_irqinitialize(void)

   /* Set the Software Interrupt0 to a special priority */

-  up_prioritize_irq(PIC32MX_IRQSRC_CS0, (CHIP_SW0_PRIORITY << 2));
+  up_prioritize_irq(PIC32MX_IRQ_CS0, (CHIP_SW0_PRIORITY << 2));

   /* Set the BEV bit in the STATUS register */


We now see the shell:  (note I did disable most of the debug features
you had enabled like the ones for memory managment)
❯ ./mipsel-softmmu/qemu-system-mipsel   -machine pic32mx7-explorer16
-nographic -monitor none   -serial stdio   -kernel
~/nuttx/wrk/nuttx/nuttx.hex
Board: Microchip Explorer16
Processor: M4K
RAM size: 128 kbytes
Load file: '/home/bashton/nuttx/wrk/nuttx/nuttx.hex', 250312 bytes
nx_start: Entry
uart_register: Registering /dev/console
uart_register: Registering /dev/ttyS0
uart_register: Registering /dev/ttyS1
nx_start_application: Starting init thread

NuttShell (NSH) NutnxtX_s-1tart0: .0.1
nsh> CPU0: Beginning Idle Loop

nsh> uname -a
NuttX 10.0.1 198649273f-dirty Feb 21 2021 18:53:48 mips pic32mx-starterkit


Hopefully this was helpful and gets you unblocked.

--Brennan

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